Job description

Waymo is an autonomous driving technology company with the mission to be the world's most trusted driver. Since its start as the Google Self-Driving Car Project in 2009, Waymo has focused on building the Waymo Driver—The World's Most Experienced Driver™—to improve access to mobility while saving thousands of lives now lost to traffic crashes. The Waymo Driver powers Waymo’s fully autonomous ride-hail service and can also be applied to a range of vehicle platforms and product use cases. The Waymo Driver has provided over ten million rider-only trips, enabled by its experience autonomously driving over 100 million miles on public roads and tens of billions in simulation across 15+ U.S. states. The Planner/Perception Reliability team’s goal is to build out architectures, tools, and workflows to prevent, identify, and guide fixes of reliability and software integrity issues. We focus the organization on reliability and are accountable for the onboard software health while enabling high development velocity. In this hybrid role you will report to a Tech Lead Manager. You will: Drive the design and development of instrumentation and onboard architecture to proactively prevent, detect, and debug reliability issues across current and future Waymo compute platforms. Design and implement long-term strategies to systematically mitigate compute hardware reliability and numerical stability issues across heterogeneous platforms (CPU, TPU, GPU), creating scalable tools to automate triage, debugging, and resolution. Lead cross-functional initiatives across Waymo, Alphabet, and external partners to architect proactive solutions that prevent issues originating from compilers (LLVM, XLA, JAX), optimization (AutoFDO), or model changes. Architect frameworks and diagnostics to proactively identify and eliminate complex software and firmware faults, including deadlocks, memory corruption, race conditions, memory leaks, or tail latency spikes. Influence the design and tooling of next-generation hardware platforms, serving as a technical authority to ensure a coherent, forward-looking reliability architecture. You have: BS/MS in Comp Sci, EE, Robotics, Physics, Math, or related field (or equivalent experience). Experience in C++. Experience with CUDA/GPU/TPU acceleration and model reliability or optimization. Experience with writing GPU kernels and evaluation/debugging of GPU workloads. We prefer: MS or PhD in Computer Science, Robotics, similar technical field of study, or equivalent practical experience. Experience with autonomous vehicles (L4) or ADAS systems (L2/L3). Experience in software reliability space. The expected base salary range for this full-time position across US locations is listed below. Actual starting pay will be based on job-related factors, including exact work location, experience, relevant training and education, and skill level. Your recruiter can share more about the specific salary range for the role location or, if the role can be performed remote, the specific salary range for your preferred location, during the hiring process. Waymo employees are also eligible to participate in Waymo’s discretionary annual bonus program, equity incentive plan, and generous Company benefits program, subject to eligibility requirements. Salary Range $251,000 — $310,000 USD

Requirements

Must-haves

We focus the organization on reliability and are accountable for the onboard software health while enabling high development velocity.
In this hybrid role you will report to a Tech Lead Manager.
Drive the design and development of instrumentation and onboard architecture to proactively prevent, detect, and debug reliability issues across current and future Waymo compute platforms.
Lead cross-functional initiatives across Waymo, Alphabet, and external partners to architect proactive solutions that prevent issues originating from compilers (LLVM, XLA, JAX), optimization (AutoFDO), or model changes.
Architect frameworks and diagnostics to proactively identify and eliminate complex software and firmware faults, including deadlocks, memory corruption, race conditions, memory leaks, or tail latency spikes.
Influence the design and tooling of next-generation hardware platforms, serving as a technical authority to ensure a coherent, forward-looking reliability architecture.
BS/MS in Comp Sci, EE, Robotics, Physics, Math, or related field (or equivalent experience).
Experience in C++.
Experience with CUDA/GPU/TPU acceleration and model reliability or optimization.
Experience with writing GPU kernels and evaluation/debugging of GPU workloads.
MS or PhD in Computer Science, Robotics, similar technical field of study, or equivalent practical experience.
Experience with autonomous vehicles (L4) or ADAS systems (L2/L3).
Experience in software reliability space.

Nice-to-haves

None flagged.

Application prep

Use the role’s language and application details while tailoring your materials.

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