Senior System Engineer
Nexperia· enterprise· Semiconductors· Sep 22, 2026 · 1mo ago
Dallas
In office
Full-time
Senior
$145K–$185K est.
10+ years exp
Job description
Systems Engineer, NeXteam (R&D)
NeXteam is a part of our R&D organization chartered to develop breakthrough technologies, drive next-generation differentiated solutions, and recruit top technical talent. We are seeking a collaborative Systems Engineer to identify and define next-generation Power Management Integrated Circuit (PMIC) and Signal Chain solutions. You will translate advanced application needs into highly differentiated IC specifications while partnering across Business Groups with GaN, SiC, and advanced MOS teams to architect future power systems.
Key Responsibilities
R&D Innovation: Identify breakthrough product concepts for high-impact markets like Automotive/EV, Data Centers, and AI Infrastructure.
Cross-BG Collaboration: Partner with GaN, SiC, and MOS teams to define future power trees and architectures.
Product Definition: Translate customer requirements into technical IC specifications and Product Requirement Documents (PRDs).
Technical Bridge: Act as the core technical link between external customers and internal analog/digital design and validation teams.
Feasibility & Strategy: Conduct performance, cost, and risk feasibility studies to maximize technical differentiation.
Qualifications
Required
Bachelor’s degree in Electrical Engineering or a related technical discipline.
10 years in semiconductor systems engineering, applications, or product definition.
Strong understanding of power electronics, topologies, and analog/mixed-signal ICs.
Proven ability to translate complex system needs into actionable hardware specifications.
Preferred
Master’s degree or Ph.D. in Electrical Engineering.
Experience defining PMICs, multi-phase regulators, or power trees for AI or Automotive systems.
Familiarity with simulation, power integrity, thermal/EMI constraints, and silicon validation.
Experience with GaN, SiC, and BCD processes/products
3 yrs in IC Design
Holds multiple patents in semiconductor product/circuit or power topology design.
Join a global team at the forefront of innovation and play a key role in shaping the future of Nexperia’s product offerings.
Nexperia is an Equal Opportunity Employer that does not discriminate on the basis of actual or perceived race, color, creed, religion, national origin, ancestry, citizenship status, age, sex or gender (including pregnancy, childbirth and pregnancy-related conditions), gender identity or expression (including transgender status), sexual orientation, marital status, military service and veteran status, physical or mental disability, genetic information, or any other characteristic protected by applicable federal, state or local laws and ordinances. Nexperia’s management team is dedicated to this policy with respect to recruitment, hiring, placement, promotion, transfer, training, compensation, benefits, TeamNexperian’s activities, access to facilities and programs and general treatment during employment.
For more details please contact: Mike.Simonek nexperia.com
Talent acquisition based on Nexperia vacancies is not appreciated. Nexperia job adverts are Nexperia copyright © material and the word Nexperia® is a registered trademark.
D&I Statement
As an equal-opportunity employer, Nexperia values diversity not just because it is the right thing to do but because diverse teams perform better. We are dedicated to being inclusive, and a proof point of this dedication is that we were the main partner of the very first Dutch Paralympic Team NL House during the Paris 2024 Paralympic Games. Our recruitment process is inclusive and accessible to all, and we consider all applicants fairly, as well as providing a safe work environment and reasonable adjustments where requested.
In addition, we offer our colleagues the possibility to join employee resource groups such as the Pride Network Group or global and local Women s groups. Nexperia is committed to increasing women in management positions to 30% by 2030.
Application prep
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