Job description

Overview We design and build medical devices. The engineering team is small, which means you'll own real work early and see your designs go into products that reach patients. You'd own the digital logic and board-level hardware side of our systems. Our embedded software lead handles Linux, device drivers, and application code. You won't be asked to do everything. You'd be the hardware half of a two-person core. One thing we want to be upfront about: our advanced FPGA development is currently done by an engineering partner firm. We intend to bring that work in-house, and this role is how we do it. You'd start by working alongside their engineers and grow into owning it over your first year or two. This process involves reading their designs, contributing to those designs and learning the architecture. This is a funded, planned transition, and the partner firm knows and supports it. They'll continue working with us on other projects. That means we're not expecting you to walk in and architect an FPGA on day one. We're looking for someone with strong fundamentals who wants to grow into that ownership with real support while doing it. What you'd actually do Write and verify synthesizable HDL, and close timing on real designs Draw board-level schematics for FPGA-centric hardware: component selection, power architecture, clock distribution, peripheral and memory interfaces Bring boards up on the bench and debug what doesn't work Work with a layout engineer on stack-up and routing Write Python to automate hardware testing so we stop doing it by hand Contribute to design documentation and verification within our quality system Grow into architectural ownership of our FPGA designs What we need you to have done already 2–4 years of hands-on embedded or digital design work Written HDL that went somewhere real. Verilog, SystemVerilog, or VHDL. You've simulated it, synthesized it, and dealt with timing. Used an FPGA toolchain end-to-end. We use Xilinx and Vivado. If your experience is Intel/Quartus, Lattice, or something else, the fundamentals transfer and we'll get you up to speed. Drawn a schematic yourself. Altium, KiCad, OrCAD, whatever. We mean designed a board, not reviewed someone else's. Written C, C++, or Rust (preferred) at a low level. Python for scripting and data analysis. Comfort with an oscilloscope and a logic analyzer. You should be the kind of engineer who reaches for a probe before a forum post. Working knowledge of SPI, I2C, and UART and their FPGA implementations (IP Block or hand coded HDL). Working knowledge of DSP, DDR interfaces, or high-speed signal integrity Helpful, but genuinely not required We don't expect any one candidate to have all of these. Tell us which ones you have and we'll take it from there. Xilinx Vivado/Vitis specifically, or AXI interconnect Zynq, MPSoC, or SoC design Precision analog front-ends, ADCs, DACs, power management ICs Work in a regulated environment: medical, aerospace, automotive safety Kernel driver experience. Take a hardware design and implement a Linux kernel driver. Who does well here Someone who's honest about the edges of what they know. Someone who'd rather ask a question than guess. Someone who's willing to do the unglamorous parts: writing the test fixture, updating the schematic, and documenting the design. These are the things that allow the hardware to enter production and actually ship. If you're strong in one area and thin in another, apply anyway and tell us which is which. How to apply Attach your resume, plus a few paragraphs describing one hardware or HDL problem you personally debugged. Tell us What was broken How you found it What you changed. We care more about that than a skills list. If you have a GitHub, a portfolio, or a project writeup, include it. Benefits and Salary We attract the best people in the business with our competitive benefits package, including medical, dental, and vision coverage; a 401(k) plan with employer contribution; paid holidays, vacation, and tuition reimbursement. We offer a competitive salary commensurate with experience and location. If you enjoy being part of a high-performing, professional, technology-focused organization, please apply today!

Requirements

Must-haves

That means we're not expecting you to walk in and architect an FPGA on day one. We're looking for someone with strong fundamentals who wants to grow into that ownership with real support while doing it.
What you'd actually do
Write and verify synthesizable HDL, and close timing on real designs
Draw board-level schematics for FPGA-centric hardware: component selection, power architecture, clock distribution, peripheral and memory interfaces
Bring boards up on the bench and debug what doesn't work
Work with a layout engineer on stack-up and routing
Write Python to automate hardware testing so we stop doing it by hand
Contribute to design documentation and verification within our quality system
Grow into architectural ownership of our FPGA designs
What we need you to have done already
2–4 years of hands-on embedded or digital design work
Written HDL that went somewhere real. Verilog, SystemVerilog, or VHDL. You've simulated it, synthesized it, and dealt with timing.
Used an FPGA toolchain end-to-end. We use Xilinx and Vivado. If your experience is Intel/Quartus, Lattice, or something else, the fundamentals transfer and we'll get you up to speed.
Drawn a schematic yourself. Altium, KiCad, OrCAD, whatever. We mean designed a board, not reviewed someone else's.
Python for scripting and data analysis.
Comfort with an oscilloscope and a logic analyzer. You should be the kind of engineer who reaches for a probe before a forum post.
Working knowledge of SPI, I2C, and UART and their FPGA implementations (IP Block or hand coded HDL).
Working knowledge of DSP, DDR interfaces, or high-speed signal integrity
Helpful, but genuinely not required
We don't expect any one candidate to have all of these. Tell us which ones you have and we'll take it from there.
Xilinx Vivado/Vitis specifically, or AXI interconnect
Zynq, MPSoC, or SoC design
Precision analog front-ends, ADCs, DACs, power management ICs

Nice-to-haves

Written C, C++, or Rust (preferred) at a low level.

Application prep

Use the role’s language and application details while tailoring your materials.

Keywords to mirror

gopythonrust

Platform: greenhouse
Effort: quick

Benefits

Benefits detected in the listing.

Dental

Vision

401(K)