Job description

ADVANCE YOUR CAREER. ADVANCE THE WORLD. At AMD, we believe technology has the power to solve the world’s most important challenges. From advancing healthcare and scientific discovery to powering AI and the technologies people rely on every day, innovation at AMD is shaping the future. Whether you’re designing next-gen processors, enabling AI breakthroughs, or bringing leading edge products to market, every role at AMD contributes to something bigger — technology that moves the world forward. Join us and, together, we’ll advance your career. As an AMD intern and co-op, you’ll be placed at the epicenter of the AI ecosystem, working alongside experts and industry pioneers. You’ll do important work, learn new skills, expand your network, and gain real-world experience on projects that impact millions of end-users worldwide. Whether you’re an undergrad or a PhD student, your contributions matter—and your experience here will be a launchpad for what comes next. JOB DETAILS: • Location: San Jose, CA or Santa Clara,CA • Onsite: This role requires the student to work full time (40 hours a week), onsite work structure throughout the duration of the co-op/intern term • Duration: • Spring/Summer Co-op : January 25, 2027 - August 13, 2027 • Summer Internship: • Semester Students: May 24, 2027 - August 13, 2027 • Quarter Students: June 21, 2027 - September 10, 2027 • Summer/Fall Co-op : • Semester Students: May 24, 2027 - December 10, 2027 • Quarter Students: June 21, 2027 - December 10, 2027 WHAT YOU WILL BE DOING We are seeking a highly motivated Analog/Mixed-Signal Design Co-op to join our world-class team. In this role, you will contribute to the development of high-speed communication and optical interconnect technologies while gaining hands-on experience with advanced analog and mixed-signal circuit design. • You will help define circuit architectures optimized for high-bandwidth electrical and optical links. • You will perform link-level simulations using MATLAB and/or SPICE to evaluate and validate proposed architectures. • You will contribute to the design and modeling of on-die RF passive components, including inductors, capacitors, and optical structures. • You will assist in the design and implementation of key circuit building blocks including DACs, SAR-ADCs, sample-and-hold circuits, analog front ends, PLLs, reference generation circuits, and clock distribution networks in advanced FinFET technologies. • You will gain exposure to the design of high-speed ADC-based receivers, DAC-based transmitters, and silicon-photonics transceivers. WHO WE ARE LOOKING FOR • PhD student currently pursuing a degree in Electrical Engineering or a closely related field. • Experience in the design and simulation of analog and mixed-signal circuits such as ADCs, DACs, CTLEs, PLLs, and clocking circuits for SerDes applications. • Strong understanding of high-speed SerDes architectures and circuit design principles. • Experience using MATLAB, SPICE, and other industry-standard CAD tools for simulation and design implementation. • Hands-on experience with CMOS circuit design in advanced technology nodes. • Experience designing wireline and/or optical transceiver building blocks is preferred. • Passion for solving complex technical challenges and developing innovative communication technologies. Note: By submitting your application, you are indicating your interest in AMD intern positions. We are recruiting for multiple positions, and if your experience aligns with any of our intern opportunities, a recruiter will contact you. This role is not eligible for visa sponsorship. Benefits offered are described: AMD benefits at a glance . AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Requirements

Must-haves

ADVANCE YOUR CAREER. ADVANCE THE WORLD.
Location: San Jose, CA or Santa Clara,CA
Onsite: This role requires the student to work full time (40 hours a week), onsite work structure throughout the duration of the co-op/intern term
Spring/Summer Co-op : January 25, 2027 - August 13, 2027
Semester Students: May 24, 2027 - August 13, 2027
Quarter Students: June 21, 2027 - September 10, 2027
Semester Students: May 24, 2027 - December 10, 2027
Quarter Students: June 21, 2027 - December 10, 2027
You will help define circuit architectures optimized for high-bandwidth electrical and optical links.
You will perform link-level simulations using MATLAB and/or SPICE to evaluate and validate proposed architectures.
You will contribute to the design and modeling of on-die RF passive components, including inductors, capacitors, and optical structures.
You will gain exposure to the design of high-speed ADC-based receivers, DAC-based transmitters, and silicon-photonics transceivers.
PhD student currently pursuing a degree in Electrical Engineering or a closely related field.
Experience in the design and simulation of analog and mixed-signal circuits such as ADCs, DACs, CTLEs, PLLs, and clocking circuits for SerDes applications.
Strong understanding of high-speed SerDes architectures and circuit design principles.
Experience using MATLAB, SPICE, and other industry-standard CAD tools for simulation and design implementation.
Hands-on experience with CMOS circuit design in advanced technology nodes.
Passion for solving complex technical challenges and developing innovative communication technologies.
Benefits offered are described: AMD benefits at a glance .
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.

Nice-to-haves

Experience designing wireline and/or optical transceiver building blocks is preferred.

Application prep

Use the role’s language and application details while tailoring your materials.

Keywords to mirror

Platform: amd
Effort: medium