Job description

Grow with us Principal Back-End CAD Engineer – Physical Implementation & AI, Austin, Texas This is an on-site, hybrid work schedule. This is not a remote work opportunity. About the Role As part of PEU Silicon and the Silicon CAD group, we are building the next generation of silicon development infrastructure and methodologies that power our ASIC roadmap. We are looking for a highly experienced Back-End CAD engineer who combines deep Physical Design expertise with a passion for automation, methodology development, and AI-driven innovation. This role goes far beyond traditional CAD support. You will own and evolve our Back-End implementation framework, FlowJam, working directly with Physical Design teams to deliver industry-leading Power, Performance, Area, and Productivity across multiple ASIC programs. You will help define how future physical implementation is performed—from advanced-node synthesis and place-and-route methodologies to AI-assisted design optimization and next-generation CAD infrastructure. If you enjoy solving hard problems, building scalable engineering platforms, and influencing the future of silicon development, we'd like to talk. What You Will Do • Lead the architecture, development, and evolution of FlowJam, our Back-End CAD flow framework. • Partner closely with Physical Design teams to drive implementation methodology and execution across multiple ASIC programs. • Develop and optimize synthesis, place-and-route, timing closure, power optimization, and signoff methodologies for advanced technology nodes. • Drive continuous improvements in QoR, runtime, scalability, and engineering productivity. • Define reusable methodologies and automation frameworks that accelerate project execution. • Evaluate and deploy next-generation EDA capabilities across both Synopsys and Cadence tool ecosystems. • Collaborate with EDA vendors to drive methodology improvements, debug tool issues, and influence future capabilities. • Explore and integrate AI technologies that improve implementation, design-space exploration, closure, debug, and engineering efficiency. • Help define the long-term roadmap for Back-End CAD and physical implementation within PEU Silicon. • Mentor engineers and help build a culture of technical excellence and execution. What You Bring • 10+ years of experience in Physical Design, Back-End CAD, or Physical Implementation Methodology. • Deep expertise in synthesis, floorplanning, placement, clock-tree synthesis, routing, timing closure, and power optimization. • Strong hands-on experience with Synopsys Fusion Compiler and/or Cadence Innovus. • Proven experience developing and deploying methodologies on advanced technology nodes. • Strong understanding of complete RTL-to-GDS implementation flows. • Expertise in Python, Tcl, and automation framework development. • Experience driving methodology improvements across multiple projects and engineering teams. • Strong communication and leadership skills with the ability to influence engineers, project teams, and EDA vendors. • Curiosity about how AI will transform silicon development and enthusiasm for building the next generation of engineering workflows. Join our Team Why Join Us This is a rare opportunity to shape the future of physical implementation within a high-performing silicon organization. You'll work on challenging ASIC programs, influence critical engineering decisions, partner directly with leading EDA vendors, and help define how AI transforms semiconductor development. We're an execution-focused team that values ownership, technical excellence, and delivering results. We move quickly, solve difficult problems, and build solutions that matter. Education & Experience • BS/MS, Electrical Engineering, Computer Science or similar with 10+ years of experience. What happens once you apply? Click Here to find all you need to know about what our typical hiring process looks like. Ericsson uses a merit-based hiring approach that values people with different experiences, perspectives and skillsets. We truly believe this approach drives innovation, which is essential for our future growth. We encourage people from all backgrounds to apply and realize their full potential as part of our Ericsson team. Ericsson is proud to be an Equal Opportunity employer, learn more. If you need assistance or to request an accommodation due to a disability, please contact Ericsson at hr.direct.americas@ericsson.com. DISCLAIMER: The above statements are intended to describe the general nature and level of work being performed by employees in this position. They are not an exhaustive list of all responsibilities, duties and skills required for this position, and you may be required to perform additional job tasks as assigned. Primary country and city: USA || Austin, Texas Job details: Developer Primary Recruiter: Jim Everett Compensation and Benefits at Ericsson At Ericsson, we know that our people are the key to our success. We offer a competitive package to help with your individual needs and goals. Your Pay The salary range for this position is dependent on various factors including, but not limited to, location, and the candidate’s combination of job-related knowledge, qualifications, skills, education, training, and experience. Short-Term Variable Compensation Plan: Your pay also includes the opportunity for an annual bonus. Actual bonus payouts are based on performance of the business against the unit’s objectives, individual performance, and the individual bonus target. Certain eligibility and pro-ration rules apply. Your Health Ericsson offers excellent health benefits including the choice of three medical plan options and a dental plan option that allow an employee to select the level of coverage that suits their needs. Employees will receive company credits in an amount equal to the cost that Ericsson pays toward the cost of their medical and dental premiums for themselves and eligible covered dependents. Your Financial Security We invest in both your short and long-term financial wellbeing. The Ericsson US 401(k) Plan offers an automatic 3% company contribution and Ericsson match $1 for every $1 you put into the 401(k) Plan on the first 3% of your eligible pay, plus 50 cents on every $1 on the next 2% of eligible pay. When you contribute at least 5% of eligible pay, you are receiving Ericsson’s full matching contributions of 4%. Matching and company automatic contributions stop when your total eligible pay for the year reaches the IRS limits. Employees will also receive company credits in an amount equal to the cost of basic life insurance and basic accidental death and dismemberment coverage, as well as short-term and long-term disability coverage. Employees also have the option to participate in Ericsson’s Stock Purchase Plan. Your Time Your work-life balance is important to us. New employees are provided a minimum of 15 days of accrued vacation, up to 3 personal days per year, 11 annual holidays, 8 hours of volunteer time, and 80 hours of sick time annually. Please note paid time off is pro-rated based on the employee’s start date. Furthermore, Ericsson provides up to 16 weeks of paid maternity leave and 6 weeks of parental or adoption leave at 100% of pay. Additional Benefits Ericsson offers many other company-paid benefits such as financial wellness programs, educational assistance, matching gifts, and recognition programs.

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Grow with us
Principal Back-End CAD Engineer – Physical Implementation & AI, Austin, Texas
This is an on-site, hybrid work schedule.
This is not a remote work opportunity.
As part of PEU Silicon and the Silicon CAD group, we are building the next generation of silicon development infrastructure and methodologies that power our ASIC roadmap.
We are looking for a highly experienced Back-End CAD engineer who combines deep Physical Design expertise with a passion for automation, methodology development, and AI-driven innovation.
You will help define how future physical implementation is performed—from advanced-node synthesis and place-and-route methodologies to AI-assisted design optimization and next-generation CAD infrastructure.
If you enjoy solving hard problems, building scalable engineering platforms, and influencing the future of silicon development, we'd like to talk.
Lead the architecture, development, and evolution of FlowJam, our Back-End CAD flow framework.
Partner closely with Physical Design teams to drive implementation methodology and execution across multiple ASIC programs.
Develop and optimize synthesis, place-and-route, timing closure, power optimization, and signoff methodologies for advanced technology nodes.
Drive continuous improvements in QoR, runtime, scalability, and engineering productivity.
Define reusable methodologies and automation frameworks that accelerate project execution.
Evaluate and deploy next-generation EDA capabilities across both Synopsys and Cadence tool ecosystems.
Collaborate with EDA vendors to drive methodology improvements, debug tool issues, and influence future capabilities.
Explore and integrate AI technologies that improve implementation, design-space exploration, closure, debug, and engineering efficiency.
Help define the long-term roadmap for Back-End CAD and physical implementation within PEU Silicon.
Mentor engineers and help build a culture of technical excellence and execution.
10+ years of experience in Physical Design, Back-End CAD, or Physical Implementation Methodology.
Deep expertise in synthesis, floorplanning, placement, clock-tree synthesis, routing, timing closure, and power optimization.
Strong hands-on experience with Synopsys Fusion Compiler and/or Cadence Innovus.
Proven experience developing and deploying methodologies on advanced technology nodes.
Strong understanding of complete RTL-to-GDS implementation flows.
Expertise in Python, Tcl, and automation framework development.

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Dental

401(K)

Paid Time Off

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