Job description

Seeking a Senior FPGA design engineer with 7 to 15 years of experience. In this role, you will drive innovative solutions in the Semiconductor Test Group at Cohu. At Cohu, semiconductor test solutions span digital, RF, and mixed signal applications. Essential Duties and Responsibilities: This role is an exciting opportunity to design challenging solutions for semiconductor test instruments. You will be involved in all stages of product development from initial concept through release to manufacturing. You will be working alongside other FPGA designers as well as collaborating with software and hardware engineers to drive compelling FPGA solutions to solve complex system requirements. This role is for FPGA implementation to support key functions across multiple test instrument families. This includes: • High speed PCIe • High bandwidth DDR memory • Waveform generation and digitization • DSP implementation • Precision analog signal control and calibration Work activities involve: • FPGA design using AMD and Intel FPGA devices • RTL design and simulation • System-level FPGA architecture definition and translation of instrument requirements into RTL implementations • High-speed interfaces and memory subsystem design including JESD, PCIe, DMA, and DDR4/5 • Board-level debug, and lab bring-up using standard lab equipment • Revision control and configuration management • Collaboration with software and hardware engineers to ensure proper integration of a complete test instrument • Interaction with other functional groups and coordination with outside design resources • Must be a self-motivated individual to work in a fast-paced environment • Generation of technical documentation and reports Required Qualifications: • BS, MS, or PhD • Minimum 7 years of experience with RTL and FPGAs • Expertise with RTL design and simulation • Experience with AMD (Xilinx) or Altera tools • Proficiency using simulation tools such as Modelsim, VCS, or Xcelium • Verilog/System Verilog language experience • Ability to work independently or as part of a team and follow through on assignments with minimal supervision • Attention to detail and high degree of accuracy • English language proficiency Desired Qualifications: • Working knowledge of Python • Working knowledge of C/C++ • Formal verification experience • Experience with AMD (Xilinx) or Altera SoC devices and toolchains Compensation: The estimated base pay range for this position is $135,000-$150,000 per year, depending on qualifications, experience, education, and other job-related factors. This range represents Cohu’s good faith estimate of what it reasonably expects to pay for this role upon hire. This role may also be eligible for other compensation programs as determined by company policy. Featured benefits • Medical, dental & vision insurance • 401(k) with company matching contributions • Employee Stock Purchase Plan • Tuition assistance • Disability & life insurance • Profit Sharing

Requirements

Must-haves

High speed PCIe
High bandwidth DDR memory
Waveform generation and digitization
DSP implementation
Precision analog signal control and calibration
FPGA design using AMD and Intel FPGA devices
RTL design and simulation
System-level FPGA architecture definition and translation of instrument requirements into RTL implementations
High-speed interfaces and memory subsystem design including JESD, PCIe, DMA, and DDR4/5
Board-level debug, and lab bring-up using standard lab equipment
Revision control and configuration management
Collaboration with software and hardware engineers to ensure proper integration of a complete test instrument
Interaction with other functional groups and coordination with outside design resources
Must be a self-motivated individual to work in a fast-paced environment
Generation of technical documentation and reports
BS, MS, or PhD

Nice-to-haves

Working knowledge of Python
Working knowledge of C/C++
Formal verification experience
Experience with AMD (Xilinx) or Altera SoC devices and toolchains
Featured benefits
Employee Stock Purchase Plan
Tuition assistance
Profit Sharing

Application prep

Use the role’s language and application details while tailoring your materials.

Keywords to mirror

python

Platform: oracle-cloud
Effort: medium

Benefits

Benefits detected in the listing.

Dental

Vision

401(K)