Job description

SCG sits at the crossroads of design, architecture, marketing, and productization—owning the journey from the architecture stage through final product definition across Gaming, Datacenter, Automotive, and Embedded markets. As a System Verification CoDesign Engineer, you will work on system-level speed features, develop the verification collaterals and automation infrastructure to characterize and validate them, and lead debug of the complex silicon issues that stand between a program and on-time shipment. This is a hands-on role for an engineer who combines deep technical craft with the drive to compress cycle time using modern tooling—including AI—without losing rigor. What You’ll Be Doing: • Collaborate cross-functionally with system architects, hardware, firmware/software, process/reliability, and operations teams to co-design system-level speed features and deliver industry-defining products. • Understand system level behavior and speed reliability margins, bounding box constraints and identify solutions that optimize margins . • Translate hardware features and architectural requirements into verification techniques that achieve full coverage across testing flows. • Perform closed loop validation by correlat ing silicon behavior against timing simulation and design expectations; provide actionable feedback to improve future designs. • Define, prototype, and refine pre- and post-silicon bring-up flows to ensure product quality, performance, and schedule efficiency. • Design and implement automation tools for system speed modeling; apply AI and LLM-assisted workflows (e.g., automated log analysis, pattern detection, scripting acceleration) to compress characterization and debug cycles. • Architect and influence testability features critical to performance, power, and reliability in partnership with design, DFx , and ATE teams. • Lead debug of complex silicon and system-level issues, including show-stopper defects, to enable on-time product shipment. What We Need to See: • MS in EE, CE, Systems Engineering, or equivalent experience. • 4+ years of experience in a related hardware engineering role. • Hands-on experience with silicon bring-up, frequency and power characterization, PPA analysis in pre- and post-silicon phases, System/Platform level understanding, tester-to-system correlation, and lab instrumentation (oscilloscopes, multimeters, DAQs). • Scripting proficiency in Python and/or Perl; comfortable in Windows, Linux, and Android environments. • Familiarity with statistical methods and data analysis tools (JMP or equivalent). • Demonstrated use of AI or LLM-based tools (e.g., Claude, Copilot, ChatGPT) in an engineering workflow—scripting acceleration, log triage, data analysis—with clear judgment about output validation and where automation introduces risk. Ways to stand out from the crowd: • Background in gaming, automotive, or datacenter segments. • Experience building or deploying AI-assisted characterization, log analysis, or debug automation workflows in a production silicon environment. • Familiarity with LLM evaluation, prompt engineering, or agentic scripting pipelines applied to silicon data analysis. Our team is at the forefront of silicon innovation, advancing groundbreaking technologies. We offer a dynamic work environment where your contributions will directly impact the company's success. Join us to advance your career in a role where you can truly make a difference. With competitive salaries and a generous benefits package, we are widely considered one of the technology industry’s most desirable employers . We have some of the most forward-thinking and hardworking people in the world working for us, and due to unprecedented growth, our exclusive engineering teams are rapidly growing. If you're a creative and autonomous engineer with a real passion for technology, we want to hear from you! #LI-Hybrid Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 136,000 USD - 218,500 USD for Level 3, and 168,000 USD - 264,500 USD for Level 4. You will also be eligible for equity and benefits . Applications for this job will be accepted at least until September 27, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Requirements

Must-haves

Collaborate cross-functionally with system architects, hardware, firmware/software, process/reliability, and operations teams to co-design system-level speed features and deliver industry-defining products.
Understand system level behavior and speed reliability margins, bounding box constraints and identify solutions that optimize margins .
Translate hardware features and architectural requirements into verification techniques that achieve full coverage across testing flows.
Perform closed loop validation by correlat ing silicon behavior against timing simulation and design expectations; provide actionable feedback to improve future designs.
Define, prototype, and refine pre- and post-silicon bring-up flows to ensure product quality, performance, and schedule efficiency.
Architect and influence testability features critical to performance, power, and reliability in partnership with design, DFx , and ATE teams.
Lead debug of complex silicon and system-level issues, including show-stopper defects, to enable on-time product shipment.
MS in EE, CE, Systems Engineering, or equivalent experience.
4+ years of experience in a related hardware engineering role.
Scripting proficiency in Python and/or Perl; comfortable in Windows, Linux, and Android environments.
Familiarity with statistical methods and data analysis tools (JMP or equivalent).
Background in gaming, automotive, or datacenter segments.
Experience building or deploying AI-assisted characterization, log analysis, or debug automation workflows in a production silicon environment.
Familiarity with LLM evaluation, prompt engineering, or agentic scripting pipelines applied to silicon data analysis.
You will also be eligible for equity and benefits .
Applications for this job will be accepted at least until September 27, 2026.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.

Nice-to-haves

None flagged.

Application prep

Use the role’s language and application details while tailoring your materials.

Keywords to mirror

aidesign systemllmpython

Platform: eightfold
Effort: medium