Job description

The application window is expected to close on: 01/04/2027 Meet the Team The Silicon One team creates innovative hardware platforms central to the AI era, powering Cisco’s core Switching, Routing, and Wireless products for organizations globally. Our innovations in silicon, optics, and hardware platforms are shaping the technology industry. We re a global team of creative experts, bringing our unique backgrounds and bold ideas to push boundaries and help each other grow. Your Impact: Our Silicon Photonics product team provides a full opportunity to go from fundamental photonic building blocks all the way to fully qualified products like CPO, NPO, OCI and pluggable modules. Our team also encourages spending time on new ideas and innovation in-line with continuous optimization of all our products. Cisco encourages filling patents to maintain its leadership position in a highly competitive market. Full-Lifecycle Responsibility: Ownership of PIC product design cycle starting from simulation to layout using Cadence Virtuoso to final GDS tapeout to post-Fab validation. Opto-Electronic Integration: Work closely with EIC & module team to co-design highly optimized Opto-Electronic chipsets satisfying system-level specifications. Fast-Paced Operation: In line with multiple PIC tapeouts a year, hitting ground running in first 6 months is expected to enable multiple products. Next-Gen Mastery: Expect responsibility to design and own small test-chips within a year or two to facilitate next-generation products. Rapid Iteration Engine: Many PIC tapeouts per year translates into parallel processing several PIC designs and tracking them through design-tapeout-Fab-validation cycle. Minimum Qualifications Bachelors 5 years of related experience, or Masters 3 years of related experience, or PhD 0 years of related experience Prior experience in Silicon Photonics circuit modeling, layouts/tapeouts, and fabrication process, including testing and validation. Prior experience in photonic device layouts both passive and active (GDS generation using appropriate EDA tools like Cadence, Virtuoso etc.) Prior experience with lab measurements, data analysis and automation using tools like Matlab, Labview, Python. Preferred Qualifications Prior experience working with cross-functional engineering teams Prior experience with OE/RF simulation (S-parameters, Co-simulation with electronic driver/TIA, HFSS) Prior experience working with silicon photonics foundries Prior experience using AI tools for data analysis, testing, and validation Why Cisco? At Cisco, we’re revolutionizing how data and infrastructure connect and protect organizations in the AI era – and beyond. We’ve been innovating fearlessly for 40 years to create solutions that power how humans and technology work together across the physical and digital worlds. These solutions provide customers with unparalleled security, visibility, and insights across the entire digital footprint. Fueled by the depth and breadth of our technology, we experiment and create meaningful solutions. Add to that our worldwide network of doers and experts, and you’ll see that the opportunities to grow and build are limitless. We work as a team, collaborating with empathy to make really big things happen on a global scale. Because our solutions are everywhere, our impact is everywhere. We are Cisco, and our power starts with you. Message to applicants applying to work in the U.S. and/or Canada: The starting salary range posted for this position is $138,100.00 to $198,200.00 and reflects the projected salary range for new hires in this position in U.S. and/or Canada locations, not including incentive compensation*, equity, or benefits. Individual pay is determined by the candidate s hiring location, market conditions, job-related skillset, experience, qualifications, education, certifications, and/or training. The full salary range for certain locations is listed below. For locations not listed below, the recruiter can share more details about compensation for the role in your location during the hiring process. U.S. employees are offered benefits, subject to Cisco’s plan eligibility rules, which include medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, paid parental leave, short and long-term disability coverage, and basic life insurance. Please see the Cisco careers site to discover more benefits and perks. Employees may be eligible to receive grants of Cisco restricted stock units, which vest following continued employment with Cisco for defined periods of time. U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies: 10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees 1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations) 80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next Additional paid time away may be requested to deal with critical or emergency issues for family members Optional 10 paid days per full calendar year to volunteer For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies. Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components, subject to the applicable Cisco plan. For quota-based incentive pay, Cisco typically pays as follows: .75% of incentive target for each 1% of revenue attainment up to 50% of quota; 1.5% of incentive target for each 1% of attainment between 50% and 75%; 1% of incentive target for each 1% of attainment between 75% and 100%; and Once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation. For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay 0% up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid. The applicable full salary ranges for this position, by specific state, are listed below: New York City Metro Area: $155,000.00 - $256,000.00 Non-Metro New York state & Washington state: $138,100.00 - $227,900.00 * For quota-based sales roles on Cisco’s sales plan, the ranges provided in this posting include base pay and sales target incentive compensation combined. ** Employees in Illinois, whether exempt or non-exempt, will participate in a unique time off program to meet local requirements.

Requirements

Must-haves

Full-Lifecycle Responsibility: Ownership of PIC product design cycle starting from simulation to layout using Cadence Virtuoso to final GDS tapeout to post-Fab validation.
Opto-Electronic Integration: Work closely with EIC & module team to co-design highly optimized Opto-Electronic chipsets satisfying system-level specifications.
Fast-Paced Operation: In line with multiple PIC tapeouts a year, hitting ground running in first 6 months is expected to enable multiple products.
Next-Gen Mastery: Expect responsibility to design and own small test-chips within a year or two to facilitate next-generation products.
Rapid Iteration Engine: Many PIC tapeouts per year translates into parallel processing several PIC designs and tracking them through design-tapeout-Fab-validation cycle.
Minimum Qualifications Bachelors 5 years of related experience, or Masters 3 years of related experience, or PhD 0 years of related experience
Prior experience in Silicon Photonics circuit modeling, layouts/tapeouts, and fabrication process, including testing and validation.
Prior experience in photonic device layouts both passive and active (GDS generation using appropriate EDA tools like Cadence, Virtuoso etc.)
Prior experience with lab measurements, data analysis and automation using tools like Matlab, Labview, Python.
Prior experience with OE/RF simulation (S-parameters, Co-simulation with electronic driver/TIA, HFSS)
Prior experience working with silicon photonics foundries
Prior experience using AI tools for data analysis, testing, and validation
We are Cisco, and our power starts with you.
Message to applicants applying to work in the U.S. and/or Canada:
U.S. employees are eligible for paid time away as described below, subject to Cisco’s policies:
10 paid holidays per full calendar year, plus 1 floating holiday for non-exempt employees
1 paid day off for employee’s birthday, paid year-end holiday shutdown, and 4 paid days off for personal wellness determined by Cisco
Non-exempt employees** receive 16 days of paid vacation time per full calendar year, accrued at rate of 4.92 hours per pay period for full-time employees
Exempt employees participate in Cisco’s flexible vacation time off program, which has no defined limit on how much vacation time eligible employees may use (subject to availability and some business limitations)
80 hours of sick time off provided on hire date and each January 1st thereafter, and up to 80 hours of unused sick time carried forward from one calendar year to the next
Additional paid time away may be requested to deal with critical or emergency issues for family members
Optional 10 paid days per full calendar year to volunteer
For non-sales roles, employees are also eligible to earn annual bonuses subject to Cisco’s policies.

Nice-to-haves

Preferred Qualifications Prior experience working with cross-functional engineering teams

Application prep

Use the role’s language and application details while tailoring your materials.

Keywords to mirror

aigopython

Platform: workday
Effort: long

Benefits

Benefits detected in the listing.

Dental

Vision

401(K)

Pto

Parental Leave

Wellness