Job description

The Superchip SoC TPM advises the effective completion and tapeout of a complex multi-die SoC. This role takes charge of the full SoC program, steering the schedule, leading cross-die interactions, mitigating risks, verifying engineering readiness, and providing executive supervision. Those in the TPM role for Superchip collaborate closely with Die TPMs, Functional TPMs, and engineering management. They function as the program’s orchestrator. Their role secures delivery according to schedule, budget, and quality requirements! Responsibilities: • Lead the overall SoC execution plan, coordinated master schedule, and tapeout readiness! • Lead and coordinate Die TPMs to maintain consistency across all silicon dies. • Drive cross-die integration, dependencies, critical path, and engineering readiness. • Partner with Functional TPMs (Front-End, Verification & Validation, Physical Build, Power & Performance, IP Management, Early Enablement, Post-Silicon, and Solution Engineering) to supervise execution health, review metrics, and drive focused deep dives where required. • Work closely with Chip Leads, Die Leads, Domain Leads, IP Technical Leads, and Engineering Managers to maintain technical and execution alignment. • Own overall program risk management, mitigation planning, and executive issues. • Coordinate and lead major SoC governance events, including landmark reviews, architecture reviews, tapeout readiness reviews, executive reviews, and multi-functional readiness reviews. • Partner with the IP Management TPM to guarantee Third Party IP planning, vendor readiness, and IP reviews align with program objectives. • Coordinate with the Post-Silicon TPM during the pre-silicon phase to ensure validation planning, lab readiness, resource planning, and smooth ownership transition after tapeout. • Collaborate with the Solution TPM to ensure alignment on board readiness, software enablement, customer platform requirements, and overall solution planning. • Consolidate program metrics, analyze trends, provide actionable insights, and support executive decision-making. • Supervise overall program resources and engineering costs to ensure execution remains aligned with business objectives. Required Skills and Experience: • Bachelor’s or Master’s degree or equivalent experience in Electrical Engineering, Computer Engineering, Computer Science, or related field. • 20+ years of semiconductor shown experience. • Minimum 5 years of Technical Program Management experience leading large-scale SoC programs. • Confirmed experience leading the development and finalization of sophisticated datacenter-class SoCs. • Strong understanding of the complete SoC development lifecycle from architecture through tapeout. • Demonstrated ability to lead large multi-functional engineering organizations without direct authority. • Technical expertise and experience in one or more of the silicon build functional areas. Desired Skills and Experience: • Experience with multi-die/chiplet architectures. • Experience leading multiple Die TPMs and Functional TPMs. • Experience with Hyperscalers or AI/datacenter silicon. • Strong executive communication and collaborator leadership skills. We're looking for a collaborative and hardworking Technical Program Manager to join our team and help drive the successful delivery of next-generation SoC programs. The ideal candidate combines strong technical competence with outstanding program management and leadership skills, enabling them to partner effectively with engineering leaders while orchestrating sophisticated, multi-functional initiatives. In this role, you'll bring teams together around a shared vision, anticipate and mitigate risks, make data-driven decisions, and develop alignment across multiple organizations. As the Superchip TPM, you'll play a pivotal role in connecting people, technology, and execution—ensuring our SoC programs are delivered on schedule, within budget, and to the highest quality standards. If you enjoy solving sophisticated challenges, influencing without authority, and working alongside elite engineers to build industry-leading technology, we'd love to hear from you. Salary Range: $308,600-$417,500 per year We value people as individuals and our dedication is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process. Our 10x Mindset At Arm, we believe progress happens when people are empowered to think bigger and push beyond what seems possible. Our 10x mindset is about curiosity, ambition and creating impact that will be used by millions. We learn fast, prioritise collaboration and turn bold ideas into real technology. We look for people who are inspired by this way of working and want to grow in an environment where bold ideas are welcomed. Discover how the 10x mindset shapes life at Arm: careers.arm.com Use of AI in Your Application At Arm, we embrace the benefits AI can bring, including in recruitment. You may use AI to support your preparation, such as improving the clarity of written responses, practicing interview questions, or learning more about our industry. However, your application and interview responses must reflect your own thinking, experience, and abilities. We want to understand your authentic perspective, creativity, and approach to problem solving. As such, you may not use AI to complete assigned tasks as part of any assessments. If you plan to use AI-supported or assistive technologies as part of a reasonable adjustment, please contact accommodations@arm.com so we can support you. Recruitment Adjustments and Accommodations At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm.com . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process. Hybrid Working Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you. Equal Opportunities Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.

Requirements

Must-haves

Lead the overall SoC execution plan, coordinated master schedule, and tapeout readiness!
Lead and coordinate Die TPMs to maintain consistency across all silicon dies.
Drive cross-die integration, dependencies, critical path, and engineering readiness.
Work closely with Chip Leads, Die Leads, Domain Leads, IP Technical Leads, and Engineering Managers to maintain technical and execution alignment.
Own overall program risk management, mitigation planning, and executive issues.
Coordinate and lead major SoC governance events, including landmark reviews, architecture reviews, tapeout readiness reviews, executive reviews, and multi-functional readiness reviews.
Partner with the IP Management TPM to guarantee Third Party IP planning, vendor readiness, and IP reviews align with program objectives.
Coordinate with the Post-Silicon TPM during the pre-silicon phase to ensure validation planning, lab readiness, resource planning, and smooth ownership transition after tapeout.
Collaborate with the Solution TPM to ensure alignment on board readiness, software enablement, customer platform requirements, and overall solution planning.
Consolidate program metrics, analyze trends, provide actionable insights, and support executive decision-making.
Supervise overall program resources and engineering costs to ensure execution remains aligned with business objectives.
Bachelor’s or Master’s degree or equivalent experience in Electrical Engineering, Computer Engineering, Computer Science, or related field.
20+ years of semiconductor shown experience.
Minimum 5 years of Technical Program Management experience leading large-scale SoC programs.
Confirmed experience leading the development and finalization of sophisticated datacenter-class SoCs.
Strong understanding of the complete SoC development lifecycle from architecture through tapeout.
Demonstrated ability to lead large multi-functional engineering organizations without direct authority.
Technical expertise and experience in one or more of the silicon build functional areas.
Experience with multi-die/chiplet architectures.
Experience leading multiple Die TPMs and Functional TPMs.
Experience with Hyperscalers or AI/datacenter silicon.
Strong executive communication and collaborator leadership skills.
Our 10x Mindset
Use of AI in Your Application

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Benefits

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