Job description

Anduril Industries is a defense technology company with a mission to transform U.S. and allied military capabilities with advanced technology. By bringing the expertise, technology, and business model of the 21st century’s most innovative companies to the defense industry, Anduril is changing how military systems are designed, built and sold. Anduril’s family of systems is powered by Lattice OS, an AI-powered operating system that turns thousands of data streams into a realtime, 3D command and control center. As the world enters an era of strategic competition, Anduril is committed to bringing cutting-edge autonomy, AI, computer vision, sensor fusion, and networking technology to the military in months, not years. ABOUT THE TEAM The Anduril Imaging team develops state-of-the-art imaging systems across both hardware and software, deployed to tackle the most significant security challenges of America and its allies. The team is heavily involved in utilizing computer vision, perception, electro-optical, infrared, and sensor data to give our war fighters and allies an advantage. ABOUT THE JOB The Imaging team is seeking a Senior FPGA Verification Engineer to help design a new product lines. In this role, you will work closely with an interdisciplinary technical team to define, complete the design and analysis, build prototypes leading to ground and flight testing, and mature the prototypes into products. WHAT YOU’LL DO Verification environment architecture and design using tools like SystemVerilog or OVM/UVM Creation of written test plan, testcases, code coverage tracking, and functional coverage tracking Testbench development for the verification of RTL blocks using VHDL or SystemVerilog Recommend new tools and practices for continuous improvement in the group's ASIC / FPGA verification flow Contribute to engineering estimates for new program pursuits. Provide technical leadership for project verification teams by breaking down work, planning activities, and reporting status REQUIRED QUALIFICATIONS A Bachelor's in Electrical Engineering, Computer Engineering, or a related technical field is typically required. 8+ years of experience developing HDL firmware for FPGA devices Demonstrated experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment. experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment. Proven ability to design, implement, and execute verification testbenches for RTL blocks using VHDL and/or SystemVerilog. experience applying chip-level verification methodologies, including constrained-random testing, functional coverage analysis, and assertion-based verification (SystemVerilog) Experience using revision control systems such as Git or Subversion to manage source code, collaborate across engineering teams, and maintain configuration integrity. Eligible to obtain and maintain an active U.S. Secret security clearance PREFERRED QUALIFICATIONS Experience with ASIC/FPGA lab validation and debug using standard lab equipment, along with familiarity with DFT, manufacturability, and production test concepts. Proficiency with Unix/Linux environments, scripting or software development (C, C++, Python, Perl, or shell), and industry-standard ASIC/FPGA simulation and synthesis tools such as QuestaSim, Synplify, Quartus, or Vivado. US Salary Range $191,000 — $254,000 USD The salary range for this role is an estimate based on a wide range of compensation factors, inclusive of base salary only. Actual salary offer may vary based on (but not limited to) work experience, education and/or training, critical skills, and/or business considerations. Highly competitive equity grants are included in the majority of full time offers; and are considered part of Anduril's total compensation package. Additionally, Anduril offers top-tier benefits for full-time employees, including: Benefits At Anduril, we invest in our people. Our comprehensive, competitive benefits package (available at little to no cost to employees) ensures you’re supported in health, recovery, and whatever comes next. For more information, Explore Our Benefits . Protecting Yourself from Recruitment Scams Anduril is committed to maintaining the integrity of our Talent acquisition process and the security of our candidates. We've observed a rise in sophisticated phishing and fraudulent schemes where individuals impersonate Anduril representatives, luring job seekers with false interviews or job offers. These scammers often attempt to extract payment or sensitive personal information. To ensure your safety and help you navigate your job search with confidence, please keep the following critical points in mind: No Financial Requests: Anduril will never solicit payment or demand personal financial details (such as banking information, credit card numbers, or social security numbers) at any stage of our hiring process. Our legitimate recruitment is entirely free for candidates. Please always verify communications: Direct from Anduril: If you receive an email from one of our recruiters, it will only come from an @anduril.com address. Via Agency Partner: If contacted by a recruiting agency for an Anduril role, their email will clearly identify their agency. If you suspect any suspicious activity, please verify the agency's authenticity by reaching out to contact@anduril.com . Exercise Caution with Unsolicited Outreach: If you receive any communication that appears suspicious, contains grammatical errors, or makes unusual requests, do not engage. Always confirm the sender's email domain is @anduril.com before providing any personal information or clicking on links. What to Do If You Suspect Fraud: Should you encounter any questionable or fraudulent outreach claiming to be from Anduril, please report it immediately to contact@anduril.com . Your proactive caution is invaluable in protecting your personal information and upholding the security and trustworthiness of our recruitment efforts. Data Privacy To view Anduril's candidate data privacy policy, please visit anduril.com . By submitting your application, you consent to Anduril Industries using a third-party service provider to conduct pre-employment risk, integrity, and due diligence screening and assessing potential risks as part of your application process. This third-party service provider provides risk-intelligence services that may include analysis of sanctions and watchlists, adverse media, public-record information, and other lawful open-source or commercial data sources. This third-party service provider does not act as a consumer reporting agency. Use of this provider helps to ensure compliance with applicable laws and protect technology, intellectual property, and organizational security.

Requirements

Must-haves

Verification environment architecture and design using tools like SystemVerilog or OVM/UVM
Creation of written test plan, testcases, code coverage tracking, and functional coverage tracking
Testbench development for the verification of RTL blocks using VHDL or SystemVerilog
Recommend new tools and practices for continuous improvement in the group's ASIC / FPGA verification flow
Contribute to engineering estimates for new program pursuits.
Provide technical leadership for project verification teams by breaking down work, planning activities, and reporting status
A Bachelor's in Electrical Engineering, Computer Engineering, or a related technical field is typically required.
8+ years of experience developing HDL firmware for FPGA devices
Demonstrated experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment.
experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment.
Proven ability to design, implement, and execute verification testbenches for RTL blocks using VHDL and/or SystemVerilog.
experience applying chip-level verification methodologies, including constrained-random testing, functional coverage analysis, and assertion-based verification (SystemVerilog)
Experience using revision control systems such as Git or Subversion to manage source code, collaborate across engineering teams, and maintain configuration integrity.
Eligible to obtain and maintain an active U.S. Secret security clearance
Direct from Anduril: If you receive an email from one of our recruiters, it will only come from an @anduril.com address.

Nice-to-haves

Experience with ASIC/FPGA lab validation and debug using standard lab equipment, along with familiarity with DFT, manufacturability, and production test concepts.

Application prep

Use the role’s language and application details while tailoring your materials.

Keywords to mirror

aipython

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Benefits

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