Would you like to help craft Arm's next generation of hardware platforms and solutions? We seek an experienced Electronics Engineer specializing in PCB <> Silicon packaging co-design and system-level hardware architect to join Arm’s Packaging, Boards and Multiphysics team. You will work with the wider business, collaborating with the SoC teams, architects and platform leads to help define, influence and align technical requirements and features. Assess design trade-offs to develop the most optimal solution for our customers and development partners.
The team works at the forefront of embedded compute, focusing on prototyping Arm's latest IP products, to build physical hardware development platforms based around custom Arm SoC.
Responsibilities:
Collaborate with engineering groups spanning multiple geographies to specify, evaluate, analyze and develop solutions for efficient PCB and silicon package integration. Focus on driving the PCB development alongside the chip packaging team, including brainstorming breakout, routing strategies, design rules and layer optimization to ensure optimal performance, reliability, and cost-effectiveness. Engage with technical leads and SoC development teams to translate technology requirements into platform architectures. Communicate technical concepts clearly and credibly across audiences ranging from Silicon and Packaging architecture to technology leads. Provide timescale estimates and justifications into the program team.
Required Skills and Experience:
• Deep technical background and understanding of SoC architectures and platforms involving high-performance embedded compute, Cloud/Edge AI, IoT space
• Experience with various high-speed IO interface standards (e.g. PCIe Gen5/6/7, LPDDR5/6, CSI, DSI) and peripherals for embedded storage and compute systems.
• Competence with embedded system board design, with complex LSI devices such as FPGAs and embedded firmware and power management ICs (PMICs)
• Familiarity with different IC packaging technologies and their impact on PCB design to ensure seamless integration of SoCs, ensuring proper signal routing and power delivery.
• Experience of collaborating with chip packaging teams. Ability to influence and drive SoC device pin-outs for cost optimization, routing feasibility and layer trade-off analysis.
• Expertise in escape routing analysis of high density SoC's and able to provide estimates of the IO count that can be routed with a particular stack-up and design rule set.
• Extensive knowledge of Signal and Power Integrity analysis techniques from both board design and chip packaging perspectives.
• Understanding of the PCB fabrication process (PTH and HDI), stackup/VIA topologies and substrate materials. Ability to collaborate with PCB fabricators and CEM partners to assess manufacturability of advanced PCB technologies.
• Evaluate package pinout options against PCB routability, SI/PI performance, layer count, manufacturability, and cost. Ability to define or review PCB layout guidelines and constraints.
• Support early silicon and board architecture definition, including component placement, form-factor constraints, PDN strategy, and routing feasibility.
• Proficiency in the use of EDA tools for schematic entry and PCB layout (Cadence OrCAD & Allegro)
• Skilled in exchanging information and maintaining positive work relationships. Positive can-do attitude and attention to detail.
• Ability to work optimally in a fast-paced environment with changing priorities and requirements; drive progress in an ambiguous environment with evolving needs
Desirable Skills and Qualities
• Experience in using Signal Integrity tools from ANSYS, Siemens EDA etc.
• Fundamental understanding of compute architectures and functional building blocks
• Experience working within the semi-conductor industry
• Enjoy collaborating and working in across geographies with multiple teams.
In Return:
You will gain a deeper understanding of system architecture and high-performance compute platforms! Work alongside other engineering teams across the business, collaborating and enabling architects, engineers and designers. You will enjoy new technical challenges faced when using advancing technologies! We offer an outstanding opportunity to join Arm at a time of exciting growth and development.
Salary Range:
$249,900-$338,100 per year We value people as individuals and our dedication is to reward people competitively and equitably for the work they do and the skills and experience they bring to Arm. Salary is only one component of Arm's offering. The total reward package will be shared with candidates during the recruitment and selection process.
Our 10x Mindset
At Arm, we believe progress happens when people are empowered to think bigger and push beyond what seems possible. Our 10x mindset is about curiosity, ambition and creating impact that will be used by millions. We learn fast, prioritise collaboration and turn bold ideas into real technology. We look for people who are inspired by this way of working and want to grow in an environment where bold ideas are welcomed. Discover how the 10x mindset shapes life at Arm: careers.arm.com
Use of AI in Your Application
At Arm, we embrace the benefits AI can bring, including in recruitment. You may use AI to support your preparation, such as improving the clarity of written responses, practicing interview questions, or learning more about our industry. However, your application and interview responses must reflect your own thinking, experience, and abilities. We want to understand your authentic perspective, creativity, and approach to problem solving. As such, you may not use AI to complete assigned tasks as part of any assessments. If you plan to use AI-supported or assistive technologies as part of a reasonable adjustment, please contact accommodations@arm.com so we can support you.
Recruitment Adjustments and Accommodations
At Arm, we want to build extraordinary teams. If you need an adjustment or an accommodation during the recruitment process, please email accommodations@arm.com . To note, by sending us the requested information, you consent to its use by Arm to arrange for appropriate accommodations. All accommodation or adjustment requests will be treated with confidentiality, and information concerning these requests will only be disclosed as necessary to provide the accommodation. Although this is not an exhaustive list, examples of support include breaks between interviews, having documents read aloud, or office accessibility. Please email us about anything we can do to accommodate you during the recruitment process.
Hybrid Working
Arm’s approach to hybrid working is designed to create a working environment that supports both high performance and personal wellbeing. We believe in bringing people together face to face to enable us to work at pace, whilst recognizing the value of flexibility. Within that framework, we empower groups/teams to determine their own hybrid working patterns, depending on the work and the team’s needs. Details of what this means for each role will be shared upon application. In some cases, the flexibility we can offer is limited by local legal, regulatory, tax, or other considerations, and where this is the case, we will collaborate with you to find the best solution. Please talk to us to find out more about what this could look like for you.
Equal Opportunities
Arm is an equal opportunity employer, committed to providing an environment of mutual respect where equal opportunities are available to all applicants and colleagues. We are a diverse organization of dedicated and innovative individuals, and don’t discriminate on the basis of race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or status as a protected veteran.
Requirements
Must-haves
The team works at the forefront of embedded compute, focusing on prototyping Arm's latest IP products, to build physical hardware development platforms based around custom Arm SoC.
Deep technical background and understanding of SoC architectures and platforms involving high-performance embedded compute, Cloud/Edge AI, IoT space
Experience with various high-speed IO interface standards (e.g. PCIe Gen5/6/7, LPDDR5/6, CSI, DSI) and peripherals for embedded storage and compute systems.
Competence with embedded system board design, with complex LSI devices such as FPGAs and embedded firmware and power management ICs (PMICs)
Familiarity with different IC packaging technologies and their impact on PCB design to ensure seamless integration of SoCs, ensuring proper signal routing and power delivery.
Experience of collaborating with chip packaging teams. Ability to influence and drive SoC device pin-outs for cost optimization, routing feasibility and layer trade-off analysis.
Expertise in escape routing analysis of high density SoC's and able to provide estimates of the IO count that can be routed with a particular stack-up and design rule set.
Extensive knowledge of Signal and Power Integrity analysis techniques from both board design and chip packaging perspectives.
Evaluate package pinout options against PCB routability, SI/PI performance, layer count, manufacturability, and cost. Ability to define or review PCB layout guidelines and constraints.
Support early silicon and board architecture definition, including component placement, form-factor constraints, PDN strategy, and routing feasibility.
Proficiency in the use of EDA tools for schematic entry and PCB layout (Cadence OrCAD & Allegro)
Skilled in exchanging information and maintaining positive work relationships. Positive can-do attitude and attention to detail.
Ability to work optimally in a fast-paced environment with changing priorities and requirements; drive progress in an ambiguous environment with evolving needs
Desirable Skills and Qualities
Experience in using Signal Integrity tools from ANSYS, Siemens EDA etc.
Fundamental understanding of compute architectures and functional building blocks
Experience working within the semi-conductor industry
Enjoy collaborating and working in across geographies with multiple teams.
Our 10x Mindset
Use of AI in Your Application
Recruitment Adjustments and Accommodations
Hybrid Working
Equal Opportunities
Nice-to-haves
None flagged.
Application prep
Use the role’s language and application details while tailoring your materials.