Job description

Standard Job Description You will be the ASIC & FPGA Designer Engineer for the Hardware Engineering team at Lockheed Martin Missiles and Fire Control (MFC). Our Team is a recognized designer, developer, and manufacturer of precision engagement aerospace and defense systems for the U.S. and allied militaries. This role is suited for an experienced FPGA professional who can drive technical strategy, mentor engineers, and shape the direction of programmable logic capabilities across programs. What You Will Be Doing As the ASIC & FPGA Design Engineer, you will serve as a recognized subject matter expert and technical leader, providing architectural guidance and strategic direction for FPGA and ASIC solutions across the MFC portfolio. Your responsibilities may include: • Owning end-to-end development of sophisticated FPGA-based architectures, from requirements capture through production release • Defining, designing, verifying, and implementing FPGA architectures using VHDL and/or Verilog, leveraging AMD Vivado, Altera Quartus, and equivalent toolchains • Conducting trade studies to select optimal FPGA devices, balancing logic utilization, power consumption, thermal performance, cost, and risk • Creating detailed FPGA requirements and interface control documents that guide cross-functional development • Applying Universal Verification Methodology (UVM) or equivalent frameworks to build robust testbenches and achieve high-coverage verification • Incorporating NSA algorithm architectures (e.g., AES, counter mode) and RF waveform implementations, including Simulink/HDL Coder integration • Supporting Design Assurance reviews (PDR, CDR, TRR) and ensuring compliance with MFC engineering standards and aerospace design practices • Providing technical leadership, mentorship, and code review guidance to engineers across the organization • Driving the Design Architecture Development process, ensuring milestones are met and risks are mitigated • Managing configuration control and versioning in LM-approved repositories (e.g., GitLab) and maintaining comprehensive design documentation • Participating in cross-functional technical meetings, risk assessments, and schedule reviews, and representing FPGA engineering in customer-facing engagements Why Join Us Do you want to be part of a company culture that empowers employees to think big, lead with a growth mindset, and make the impossible a reality? We provide the resources and give you the flexibility to enable inspiration and focus. If you have the passion and courage to dream big, work hard, and have fun doing what you love then we want to build a better tomorrow with you. We offer flexible work schedules to comprehensive benefits investing in your future and security, Learn more about Lockheed Martin’s comprehensive benefits package here. Further Information About This Opportunity: This position is in Orlando. Discover more about our Orlando, Florida location. MUST BE A U.S. CITIZEN - This position is located at a facility that requires special access. The selected candidate must be able to obtain a secret clearance. Basic Qualifications • Bachelor of Science degree in Electrical Engineering or a closely related STEM field from an accredited university; Master’s degree or PhD preferred • Minimum 5 years of professional experience with FPGA design and simulation verification or a related discipline • Proficiency in HDL programming with VHDL, Verilog, and/or SystemVerilog • Experience with Xilinx/AMD FPGAs (including Versal) and related toolsets (Vivado, Vitis, Vitis HLS) • Experience with multiple FPGA vendors (Xilinx/AMD, Altera/Intel, MicroSemi/Microchip) and their part families, internal fabric, and IP • Experience with FPGA simulation tools such as Synopsys VCS • Strong understanding of digital design principles, including timing analysis, clock domain crossing, and signal integrity • Experience in hardware-software integration, validation, and debugging • Experience with high-speed data and memory interface implementation • Experience with version control systems such as Git/GitLab • Must be a US Citizen; must possess or be able to obtain a DoD Secret clearance Desired Skills • Camera hardware design (circuit card assemblies) - design, test, troubleshooting experience a plus • Experience with SystemVerilog, Verilog, C/C++, MATLAB/Simulink; Synopsys Synplify, Synopsys VCS, NCSim, ChipScope tool sets • Experience with programmable logic verification methodologies such as UVM • Experience implementing NSA algorithms (e.g., AES, counter mode) and RF waveform implementations • Experience with Simulink and HDL Coder for model-based FPGA design • Experience managing configuration control (GitLab preferred) • Experience with EOIR imaging processing techniques and missile/processor interfaces • Ability to conduct FPGA trade-off studies focusing on device utilization, power, and thermal optimization • Excellent communication, teamwork, and leadership skills • Proven ability to collaborate effectively with cross-functional software, hardware, and systems engineering teams • Presentation skills – Comfortable delivering design reviews, technical briefings, and documentation to senior leadership • Familiarity with LM MFC Design Assurance and Design Architecture Development processes • Experience with debugging and troubleshooting complex digital systems at board level • Experience in full ASIC/FPGA lifecycle (architecture, design, simulation, verification, validation, integration & test) • Strong analytical and problem-solving skills with the ability to analyze complex technical issues and develop creative solutions • Active DoD Secret or Top Secret clearance Pay Information Full-Time Salary Range: $120600.00 - $224000.00 At Lockheed Martin, we know mission success starts with taking care of our people. Our Total Rewards program is designed to attract top talent, support your well-being, and help you grow—both professionally and personally. The salary range for this position is as listed on the requisition. Please note that the salary information listed is a general guideline only. Lockheed Martin considers factors such as (but not limited to) scope and responsibilities of the position, candidate's work experience, education/ training, key skills as well as market(work location) and business considerations when extending an offer. Benefits offered: Medical, Dental, Vision, Flexible work arrangements and schedules (e.g., 4x10), 401(k) match, Paid time off, Holidays, Parental Leave, EAP, Flexible Spending Accounts, Education Assistance, Life Insurance, Short-Term Disability, and Long-Term Disability. • Annual short-term and/or long-term incentive compensation programs may be offered depending on the position. Payments under these annual programs are not guaranteed and can vary from year to year and are tied to a range of performance metrics. • For (Washington state applicants only) Non-represented full-time employees: accrue at least 10 hours per month of Paid Time Off (PTO) to be used for incidental absences and other reasons; receive at least 90 hours for holidays. Represented full time employees accrue 6.67 hours of Vacation per month; accrue up to 52 hours of sick leave annually; receive at least 96 hours for holidays. PTO, Vacation, sick leave, and holiday hours are prorated based on start date during the calendar year.

Requirements

Must-haves

Standard Job Description
What You Will Be Doing
Owning end-to-end development of sophisticated FPGA-based architectures, from requirements capture through production release
Defining, designing, verifying, and implementing FPGA architectures using VHDL and/or Verilog, leveraging AMD Vivado, Altera Quartus, and equivalent toolchains
Conducting trade studies to select optimal FPGA devices, balancing logic utilization, power consumption, thermal performance, cost, and risk
Creating detailed FPGA requirements and interface control documents that guide cross-functional development
Applying Universal Verification Methodology (UVM) or equivalent frameworks to build robust testbenches and achieve high-coverage verification
Incorporating NSA algorithm architectures (e.g., AES, counter mode) and RF waveform implementations, including Simulink/HDL Coder integration
Supporting Design Assurance reviews (PDR, CDR, TRR) and ensuring compliance with MFC engineering standards and aerospace design practices
Providing technical leadership, mentorship, and code review guidance to engineers across the organization
Driving the Design Architecture Development process, ensuring milestones are met and risks are mitigated
Managing configuration control and versioning in LM-approved repositories (e.g., GitLab) and maintaining comprehensive design documentation

Nice-to-haves

Bachelor of Science degree in Electrical Engineering or a closely related STEM field from an accredited university; Master’s degree or PhD preferred
Camera hardware design (circuit card assemblies) - design, test, troubleshooting experience a plus
Experience with SystemVerilog, Verilog, C/C++, MATLAB/Simulink; Synopsys Synplify, Synopsys VCS, NCSim, ChipScope tool sets
Experience with programmable logic verification methodologies such as UVM
Experience implementing NSA algorithms (e.g., AES, counter mode) and RF waveform implementations
Experience with Simulink and HDL Coder for model-based FPGA design
Experience managing configuration control (GitLab preferred)
Experience with EOIR imaging processing techniques and missile/processor interfaces
Ability to conduct FPGA trade-off studies focusing on device utilization, power, and thermal optimization
Excellent communication, teamwork, and leadership skills
Proven ability to collaborate effectively with cross-functional software, hardware, and systems engineering teams
Presentation skills – Comfortable delivering design reviews, technical briefings, and documentation to senior leadership

Application prep

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Platform: eightfold
Effort: medium

Benefits

Benefits detected in the listing.

Dental

Vision

401(K)

Pto

Paid Time Off

Parental Leave