Job description

Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World’s Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities. Samsung Semiconductor Inc. (SSI) is advancing the world’s technology. As a leader in Memory, System, LSI and LCD technologies, our US teams contribute to breakthroughs in 5G, SOC, memory and display. With our global perspective and diversity of thought, we proudly serve our customers around the world. We are looking for team members who share our commitment to learning and growth and excel when collaborating within and across teams. We power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more with our technology solutions. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future. We believe that innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities. Advanced Circuit and Systems (ACAS) is looking for a Principal Engineer, Serdes Analog Design. In this role, you will actively work on architecture and circuits of high-speed interconnect transceiver (Serdes). You will help define circuits and architecture for Serdes IPs, clock generation as well as traditional analog circuits. You’ll supervise designers to deliver the complete design and to support silicon validation and debugging. You’ll work with a team to develop high-performance and low-power serdes, including display interface, camera sensor interface, UCIe / die-to-die interconnect and 224/448Gbps UA-link/Ethernet using cutting-edge process technologies. Location: Onsite at our San Jose office 5 days a week What You’ll Do Define architecture and circuits for serdes projects. Supervise designers to complete the project and to conduct silicon validation. Hands-on circuit design experience is a must. Familiarity with low-power and low-voltage analog and custom digital circuit components using advanced CMOS process technologies Translate component design specification to schematics. Build simulation test-benches to evaluate circuit performance, functionality, power consumption and reliability. Supervise layout of the complete project. Optimize layout to improve the power consumption and performance of circuits What You Bring Bachelors with 20+ years, Masters with 18+ years or PhDs with 15+ years of experience. Minimum 7+ yrs experience in Analog/Serdes SoC design experience. Knowledge and experience with analog circuits/mixed signal circuits: such as bandgap, LDO, filters. Knowledge and experience with circuits of Serdes IPS: CTLE, DFE, FFE, clock distributions, PI, IQ generation. Knowledge of Serdes architecture and high-speed interconnect standard (USB, PCIe, UCIe) Knowledge and experience with ESD, PLL, clock generation, ADC, DAC is a big plus. Well-versed in EDA tools (Cadence, Spectre, Totem, EMX) Comfortable with scripting languages (Python, Matlab) You’re inclusive, adapting your style to the situation and diverse global norms of our people. An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change. #LI-VL1 What We Offer The pay range below is for all roles at this level across all US locations and functions. Pay within this range varies by work location and may also depend on job-related knowledge, skills, and experience. We also offer incentive opportunities that reward employees based on individual and company performance. This is in addition to our diverse package of benefits centered around the wellbeing of our employees and their loved ones. In addition to the usual Medical/Dental/Vision/401k, our inclusive rewards plan empowers our people to care for their whole selves. An investment in your future is an investment in ours. Give Back With a charitable giving match and frequent opportunities to get involved, we take an active role in supporting the community. Enjoy Time Away You’ll start with 4+ weeks of paid time off a year, plus holidays and sick leave, to rest and recharge. Care for Family Whatever family means to you, we want to support you along the way—including a stipend for fertility care or adoption, caregiver support, and medical travel support. Prioritize Emotional Wellness With on-demand apps and free confidential therapy sessions, you’ll have support no matter where you are. Stay Fit Eating well and being active are important parts of a healthy life. Our onsite Café and gym, plus virtual classes, make it easier. Embrace Flexibility Benefits are best when you have the space to use them. That’s why we facilitate a flexible environment so you can find the right balance for you. Base Pay Range $219,000 — $351,000 USD Equal Opportunity Employment Policy Samsung Semiconductor takes pride in being an equal opportunity workplace dedicated to fostering an environment where all individuals feel valued and empowered to excel, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. When selecting team members, we prioritize talent and qualities such as humility, kindness, and dedication. We extend comprehensive accommodations throughout our recruiting processes for candidates with disabilities, long-term conditions, neurodivergent individuals, or those requiring pregnancy-related support. All candidates scheduled for an interview will receive guidance on requesting accommodations. Our Commitment to Innovation and Fairness At Samsung Semiconductor, we use Artificial Intelligence (AI) tools in the recruitment process to enhance efficiency. However, AI is used as a support tool, not a final decision-maker. All hiring decisions are made by our human recruiting team and hiring managers to ensure every candidate is evaluated fairly and holistically. Recruiting Agency Policy We do not accept unsolicited resumes. Only authorized recruitment agencies that have a current and valid agreement with Samsung Semiconductor, Inc. are permitted to submit resumes for any job openings. Applicant AI Use Policy At Samsung Semiconductor, we support innovation and technology. However, to ensure a fair and authentic assessment, we ask that candidates rely on their own knowledge and skills throughout the process. AI tools may be used for basic preparation, grammar, and research, but should not be used to generate or assist with submitted content or live interview responses. If we determine that AI is being used outside these guidelines, we reserve the right to pause or end the interview, and your candidacy may be disqualified. Trade Secret Notice By submitting an application, you agree not to disclose to Samsung—or encourage Samsung to use—any confidential or proprietary information (including trade secrets) belonging to a current or former employer or other entity. Applicant Privacy Policy semiconductor.samsung.com

Requirements

Must-haves

To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period.
Advancing the World’s Technology Together
Location: Onsite at our San Jose office 5 days a week
What You’ll Do
Define architecture and circuits for serdes projects.
Supervise designers to complete the project and to conduct silicon validation.
Hands-on circuit design experience is a must.
Familiarity with low-power and low-voltage analog and custom digital circuit components using advanced CMOS process technologies
Translate component design specification to schematics. Build simulation test-benches to evaluate circuit performance, functionality, power consumption and reliability.
Supervise layout of the complete project. Optimize layout to improve the power consumption and performance of circuits
Bachelors with 20+ years, Masters with 18+ years or PhDs with 15+ years of experience.
Minimum 7+ yrs experience in Analog/Serdes SoC design experience.
Knowledge and experience with analog circuits/mixed signal circuits: such as bandgap, LDO, filters.
Knowledge and experience with circuits of Serdes IPS: CTLE, DFE, FFE, clock distributions, PI, IQ generation.
Knowledge of Serdes architecture and high-speed interconnect standard (USB, PCIe, UCIe)
Knowledge and experience with ESD, PLL, clock generation, ADC, DAC is a big plus.
Well-versed in EDA tools (Cadence, Spectre, Totem, EMX)
Comfortable with scripting languages (Python, Matlab)
You’re inclusive, adapting your style to the situation and diverse global norms of our people.
An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
You’re collaborative, building relationships, humbly offering support and openly welcoming approaches.
Innovative and creative, you proactively explore new ideas and adapt quickly to change.
Our Commitment to Innovation and Fairness
Recruiting Agency Policy

Nice-to-haves

None flagged.

Application prep

Use the role’s language and application details while tailoring your materials.

Keywords to mirror

pythonrestai

Platform: greenhouse
Effort: quick

Benefits

Benefits detected in the listing.

Dental

Vision

401k

Paid Time Off

Wellness