Job description

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Come work at Amazon! As an ATE Test Engineer, you will engage with an experienced cross-disciplinary staff to conceive, design, and develop innovative test solutions for products developed for and deployed in Amazon Leo phased array antennas in LEO satellites and ground terminal products. You'll be a key contributor to defining and developing characterization and validation ATE test methodology for Amazon Leo custom silicon, helping take devices from silicon bring-up through release to high-volume production. You will contribute across digital, high-speed I/O, and RF test, and support the design and verification of the ATE hardware that enables it. You must be responsive, flexible, and able to succeed within an open, collaborative peer environment. Export Control Requirement Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Key job responsibilities • Design, review, and verify ATE hardware (load board, socket, and probe card) for signal and power integrity, with attention to high-speed and RF interfaces, collaborating with external vendors through the hardware design and build process. • Implement and optimize test programs for mm-wave System-on-Chips (SoCs) on ATE platforms such as Teradyne/Advantest and ensure seamless integration into high-volume manufacturing environments. • Implement and optimize RF, mixed-signal, and high-speed interface test routines for high-volume manufacturing. • Implement on-chip calibration techniques for analog and mixed-signal circuits and validation of calibration accuracy across process/voltage/temperature (PVT) corners. • Partner directly with DFT teams to define test insertion strategy, review pattern quality, resolve coverage gaps, and optimize scan/MBIST/BIST content for ATE execution. • Drive test program release to production, ensuring test readiness, quality, and yield targets are met at hand-off to high-volume manufacturing. • Optimize test time, yield, and repeatability across process, voltage, and temperature. • Support RMA and field-return debug, using test and characterization data to root-cause and resolve downstream quality issues - Bachelor's degree in Electrical Engineering or a related field - 4+ years of experience in ATE test engineering, preferably in high-volume manufacturing of communication/modem processors or consumer SoCs. - Experience developing and debugging test programs on Teradyne UltraFLEX and/or Advantest platforms. - Experience with digital, high-speed I/O, and RF ATE test. - Experience with ATE hardware (load board, socket, or probe card) design and verification. - Strong written and verbal communication skills. - International travel required during release-to-production phases. - Master's degree in Electrical or Communications Engineering or a related field - Experience testing digital modem, baseband, or communication processor SoCs on ATE. - Knowledge of transceiver architecture and topology, with a strong understanding of key test parameters and performance metrics. - Experience with semiconductor wafer sort testing, including RF probe-level challenges and associated test methodologies. - Digital test techniques such as scan, ATPG, MBIST, and loopback; JTAG and IEEE 1149.x. - ATE hardware design and verification, including signal/power integrity analysis for high-speed and RF interfaces, and working with vendors through the hardware design and build process. - Test automation of bench equipment for digital electronics (e.g., pattern generators, logic analyzers) and RF electronics (e.g., spectrum analyzers, VNAs). - Familiarity with the New Product Introduction (NPI) process, from characterization through release to high-volume production. - Experience with OTP/eFuse test and programming. - Experience with source control (Git, SVN) and issue tracking (JIRA). Amazon is an equal opportunity employer and does not discriminate on the basis of protected veteran status, disability, or other legally protected status. Los Angeles County applicants: Job duties for this position include: work safely and cooperatively with other employees, supervisors, and staff; adhere to standards of excellence despite stressful conditions; communicate effectively and respectfully with employees, supervisors, and staff to ensure exceptional customer service; and follow all federal, state, and local laws and Company policies. Criminal history may have a direct, adverse, and negative relationship with some of the material job duties of this position. These include the duties and responsibilities listed above, as well as the abilities to adhere to company policies, exercise sound judgment, effectively manage stress and work safely and respectfully with others, exhibit trustworthiness and professionalism, and safeguard business operations and the Company’s reputation. Pursuant to the Los Angeles County Fair Chance Ordinance, we will consider for employment qualified applicants with arrest and conviction records. Our inclusive culture empowers Amazonians to deliver the best results for our customers. If you have a disability and need a workplace accommodation or adjustment during the application and hiring process, including support for the interview or onboarding process, please visit amazon.jobs for more information. If the country/region you’re applying in isn’t listed, please contact your Recruiting Partner. The base salary range for this position is listed below. Your Amazon package will include sign-on payments and restricted stock units (RSUs). Final compensation will be determined based on factors including experience, qualifications, and location. Amazon also offers comprehensive benefits including health insurance (medical, dental, vision, prescription, Basic Life & AD&D insurance and option for Supplemental life plans, EAP, Mental Health Support, Medical Advice Line, Flexible Spending Accounts, Adoption and Surrogacy Reimbursement coverage), 401(k) matching, paid time off, and parental leave. Learn more about our benefits at amazon.jobs . USA, CA, San Diego - 153,600.00 - 215,000.00 USD annually USA, CA, Sunnyvale - 176,600.00 - 247,300.00 USD annually

Requirements

Must-haves

Amazon Leo is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world.
Come work at Amazon!
Export Control Requirement
Key job responsibilities
Implement and optimize test programs for mm-wave System-on-Chips (SoCs) on ATE platforms such as Teradyne/Advantest and ensure seamless integration into high-volume manufacturing environments.
Implement and optimize RF, mixed-signal, and high-speed interface test routines for high-volume manufacturing.
Implement on-chip calibration techniques for analog and mixed-signal circuits and validation of calibration accuracy across process/voltage/temperature (PVT) corners.
Partner directly with DFT teams to define test insertion strategy, review pattern quality, resolve coverage gaps, and optimize scan/MBIST/BIST content for ATE execution.
Drive test program release to production, ensuring test readiness, quality, and yield targets are met at hand-off to high-volume manufacturing.
Optimize test time, yield, and repeatability across process, voltage, and temperature.
Support RMA and field-return debug, using test and characterization data to root-cause and resolve downstream quality issues
Bachelor's degree in Electrical Engineering or a related field
4+ years of experience in ATE test engineering, preferably in high-volume manufacturing of communication/modem processors or consumer SoCs.
Experience developing and debugging test programs on Teradyne UltraFLEX and/or Advantest platforms.
Experience with digital, high-speed I/O, and RF ATE test.
Experience with ATE hardware (load board, socket, or probe card) design and verification.
Strong written and verbal communication skills.
International travel required during release-to-production phases.
Master's degree in Electrical or Communications Engineering or a related field
Experience testing digital modem, baseband, or communication processor SoCs on ATE.
Knowledge of transceiver architecture and topology, with a strong understanding of key test parameters and performance metrics.
Experience with semiconductor wafer sort testing, including RF probe-level challenges and associated test methodologies.
Digital test techniques such as scan, ATPG, MBIST, and loopback; JTAG and IEEE 1149.x.
ATE hardware design and verification, including signal/power integrity analysis for high-speed and RF interfaces, and working with vendors through the hardware design and build process.

Nice-to-haves

None flagged.

Application prep

Use the role’s language and application details while tailoring your materials.

Keywords to mirror

jira

Platform: amazon
Effort: medium

Benefits

Benefits detected in the listing.

Health Insurance

Dental

Vision

401(K)

Paid Time Off

Parental Leave