Job description

We are seeking an Analog ASIC Electrical Engineer in our Broomfield, CO, location. In this role, you will lead the development of ASIC designs for our Apollo and Lumos quantum computers ( Quantinuum system roadmap ). The ideal candidate will be an Electrical Engineer with a strong understanding of analog CMOS circuit design (high-voltage experience preferred), experience with transistor-level design and simulation, experience interacting with fabs, and an ability to integrate designs with complex electrical systems. This role will work alongside other ASIC designers as well as quantum architecture and packaging teams to refine the system architecture and develop scalable IP for further generations of Quantum Computers. Candidates should expect to be immersed in a fast-paced, multi-functional team-based environment with challenging technical obstacles to overcome where an individual with talent and initiative can stand out and thrive. Quantinuum believes that employees work better, more efficiently, and more collaboratively in close proximity to other employees, where ideas can be exchanged readily, and decisions can be made more quickly for the benefit of the Company and our customers. All employees should work at their assigned location; however, this role may offer the opportunity to work remotely up to 2 days per week, with approval. All applicants for placement in safety-sensitive positions will be required to submit to a pre-employment drug test. Key Responsibilities: Work with an integrated product team including external partners to architect and implement ASICs in service of Quantinuum’s quantum computer roadmap and goals. Design and optimize analog and mixed-signal integrated circuits in advanced CMOS process technologies. Translate quantum computer requirements and customer needs into a comprehensive plan to integrate ASICs into the broader roadmap and address scalability challenges. Identify technical risks and develop mitigation strategies. Translate system-level specifications into circuit architectures, design requirements, and verification plans. Work closely with system architects, digital designers, verification teams, and packaging teams to understand the impact of external subsystems on ASIC architecture and specification. Deploy ASICs in challenging environments such as cryogenic, ultra-high vacuum, and in proximity to noise-sensitive devices. Design layouts for corresponding schematic blocks and ensure compliance with DRC, LVS, ERC, reliability, and design-for-manufacturing requirements. Support analog and mixed-signal verification at block, subsystem, and full-chip levels. Co-author test plans and participate in silicon bring-up and debug activities. Identify key enabling technology areas for ASIC development including feasibility studies, prototyping, and performing risk reduction activities to ensure smooth introduction into the roadmap. Provide technical expertise that informs future product development and process improvements across the organization. Deliver products and achieve program goals in an R&D and rapid prototyping environment. YOU MUST HAVE: Bachelor’s Degree minimum Minimum 5+ years of IC design experience in a design engineering or R&D organization. Minimum 5+ years of experience with transistor-level design and simulation using industry-standard EDA tools. Minimum 3+ years of industry experience with the specification, development, verification, and test of analog ASIC technologies. Due to Contractual requirements, must be a U.S. Person defined as, U.S. citizen permanent resident or green card holder, workers granted asylum or refugee status. Due to national security requirements imposed by the U.S. Government, candidates for this position must not be a People's Republic of China national or Russian national unless the candidate is also a U.S. citizen. WE VALUE: Masters/PhD degree in Electrical Engineering or related field. 10+ years of industry experience in an engineering or R&D environment. Experience in developing design workflows for ASICs from requirements through multiple design reviews, tapeout, and delivery into production. Experience with IC layout and high-density routing conditions. Experience with ASIC integration of digital and analog circuitry such as low-noise amplifiers, DACs/ADCs, passive/active signal filtering, analog/digital control loops, and low-noise switching. Experience in ASIC development for ultra-high vacuum and cryogenic environments with a deep understanding of how cryo temperatures affect circuit performance. Expertise in ASIC power, performance, and area trade-offs. Experience with the electrical engineering challenges inherent to Quantum Computers, especially those with ion-trap architectures, and how noise from electrical systems contributes to overall error rates. Strong communication skills and a proven ability to lead by example through execution of programmatic goals, consistently demonstrating decisive business impact, and continuously driving for improvement in a rapidly changing environment. Quantinuum is a leading quantum computing company delivering a full stack platform designed to make quantum computing deployable in real-world environments. With active engagements spanning pharmaceuticals, material science, financial services, government, industrial sectors, and leading academic and research institutions worldwide, we are helping organizations unlock the transformative potential of quantum computing. Our global team of more than 800 employees includes many of the world's leading scientists, engineers, and researchers, with more than 70% of our technology team holding advanced degrees at the Master's or PhD level. Headquartered in Broomfield, Colorado, Quantinuum operates across the United States, United Kingdom, Germany, Japan, and Singapore. By joining Quantinuum, you’ll help shape the future of quantum computing, pushing the limits of technology, and making the impossible possible. What’s in it for you? We believe our people are our greatest strength and offer a comprehensive rewards package that supports your professional growth, well-being, and long-term success. Competitive compensation and the opportunity to work on groundbreaking technology Flexible work arrangements that support work-life balance Employer-subsidized medical, dental, and vision insurance 401(k) retirement savings plan with company match and student loan repayment benefit Equity opportunities Generous paid time off, sick leave, and 12 paid holidays annually Paid parental leave Employee discount programs Equal Opportunity Employer Quantinuum is proud to be an equal opportunity employer. We are committed to building an inclusive workplace where all employees and applicants are treated with respect and provided equal opportunities regardless of race, color, religion, sex, sexual orientation, gender identity or expression, national origin, age, disability, veteran status, ancestry, marital status, or any other characteristic protected by applicable law. Know Your Rights: Workplace discrimination is illegal. For more information about Quantinuum, please visit our website . We are committed to making our recruitment process accessible to all. If you require any reasonable adjustments at any stage of the application or interview process, please let us know use the Lets talk contact form. Applications will be accepted on an ongoing basis, there is no application deadline for this position.

Requirements

Must-haves

All applicants for placement in safety-sensitive positions will be required to submit to a pre-employment drug test.
Work with an integrated product team including external partners to architect and implement ASICs in service of Quantinuum’s quantum computer roadmap and goals.
Design and optimize analog and mixed-signal integrated circuits in advanced CMOS process technologies.
Translate system-level specifications into circuit architectures, design requirements, and verification plans.
Work closely with system architects, digital designers, verification teams, and packaging teams to understand the impact of external subsystems on ASIC architecture and specification.
Deploy ASICs in challenging environments such as cryogenic, ultra-high vacuum, and in proximity to noise-sensitive devices.
Design layouts for corresponding schematic blocks and ensure compliance with DRC, LVS, ERC, reliability, and design-for-manufacturing requirements.
Support analog and mixed-signal verification at block, subsystem, and full-chip levels. Co-author test plans and participate in silicon bring-up and debug activities.
Identify key enabling technology areas for ASIC development including feasibility studies, prototyping, and performing risk reduction activities to ensure smooth introduction into the roadmap.
Provide technical expertise that informs future product development and process improvements across the organization.
Deliver products and achieve program goals in an R&D and rapid prototyping environment.
Bachelor’s Degree minimum
Minimum 5+ years of IC design experience in a design engineering or R&D organization.
Minimum 5+ years of experience with transistor-level design and simulation using industry-standard EDA tools.
Minimum 3+ years of industry experience with the specification, development, verification, and test of analog ASIC technologies.
Due to Contractual requirements, must be a U.S. Person defined as, U.S. citizen permanent resident or green card holder, workers granted asylum or refugee status.
Due to national security requirements imposed by the U.S. Government, candidates for this position must not be a People's Republic of China national or Russian national unless the candidate is also a U.S. citizen.
Masters/PhD degree in Electrical Engineering or related field.
10+ years of industry experience in an engineering or R&D environment.
Experience in developing design workflows for ASICs from requirements through multiple design reviews, tapeout, and delivery into production.
Experience with IC layout and high-density routing conditions.
Experience with ASIC integration of digital and analog circuitry such as low-noise amplifiers, DACs/ADCs, passive/active signal filtering, analog/digital control loops, and low-noise switching.
Experience in ASIC development for ultra-high vacuum and cryogenic environments with a deep understanding of how cryo temperatures affect circuit performance.
Expertise in ASIC power, performance, and area trade-offs.

Nice-to-haves

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Application prep

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Benefits

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Dental

Vision

401(K)

Paid Time Off

Parental Leave