Job description

Job Details: Job Description: The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow s technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people s digital lives. Come join us and do something wonderful. Join Intel s AI Revolution Intel s AI SoC organization develops cutting-edge products powering a wide range of AI applications, from edge devices to data center accelerators. If you are an engineer with strong technical and communication skills who thrives in a fast-paced environment with abundant learning opportunities, you are the ideal candidate for this role. Join us to shape the future of AI hardware. This role is at the heart of Intel s product development process, combining technical expertise, creative problem-solving, and disciplined execution. By joining our team, you will contribute to the design and development of next-generation technologies that power the future of computing, enabling transformative experiences for billions of users worldwide. This is your opportunity to work alongside some of the brightest minds in the industry, leveraging innovative methodologies to overcome challenging design problems and shaping the future of technology. Key Responsibilities : Develop logic design, RTL coding, and simulation for SoC designs. Define and implement architecture and microarchitecture features for logic blocks. Perform quality checks across RTL, timing, power, and design integrity to meet performance goals. Optimize RTL logic to ensure compliance with power, performance, area, and timing targets. Collaborate with IP providers to integrate and validate IPs at the SoC level. Review and contribute to verification plans and ensure design features are comprehensively tested. Identify and resolve RTL test failures to ensure feature correctness. Employ secure development practices to address security objectives and threats in the design. Drive quality assurance compliance for seamless IP and SoC handoff throughout the design flow. Qualifications: You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your degree, research and or relevant previous job and or internship experiences. Minimum Qualifications: Bachelor s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field. 9 years of experience with a Bachelor s degree, 6 years with a Master s degree, or 5 years with a PhD. Expertise in microarchitecture, RTL design, coding, and simulation using SystemVerilog. Strong knowledge of system-level design principles, including power, performance, and area optimization. Demonstrated experience with timing/power convergence methodologies and tools. Preferred Qualifications: Experience with SoC architecture and SoC microarchitecture. Proficiency in clock domain crossing analysis and implementation techniques. Hands-on experience with quality assurance practices and secure development in logic design. Proven ability to effectively communicate across multidisciplinary teams. Track record of disciplined execution and delivering high-quality designs under tight deadlines. Experience in driving innovative solutions to complex design challenges. Passion for continuous learning and staying current with advancements in SoC design methodologies and technologies. Join us to push the boundaries of technology and make a lasting impact on the future of computing. Job Type: Experienced Hire Shift: Shift 1 (United States of America) Primary Location: US, California, Santa Clara Additional Locations: US, California, Folsom Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel . Annual Salary Range for jobs which could be performed in the US: $164,470.00-311,890.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process. Work Model for this Role This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

Requirements

Must-haves

Develop logic design, RTL coding, and simulation for SoC designs.
Define and implement architecture and microarchitecture features for logic blocks.
Perform quality checks across RTL, timing, power, and design integrity to meet performance goals.
Optimize RTL logic to ensure compliance with power, performance, area, and timing targets.
Collaborate with IP providers to integrate and validate IPs at the SoC level.
Review and contribute to verification plans and ensure design features are comprehensively tested.
Identify and resolve RTL test failures to ensure feature correctness.
Employ secure development practices to address security objectives and threats in the design.
Drive quality assurance compliance for seamless IP and SoC handoff throughout the design flow.
Bachelor s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
9 years of experience with a Bachelor s degree, 6 years with a Master s degree, or 5 years with a PhD.
Expertise in microarchitecture, RTL design, coding, and simulation using SystemVerilog.

Nice-to-haves

Experience with SoC architecture and SoC microarchitecture.
Proficiency in clock domain crossing analysis and implementation techniques.
Hands-on experience with quality assurance practices and secure development in logic design.
Proven ability to effectively communicate across multidisciplinary teams.
Track record of disciplined execution and delivering high-quality designs under tight deadlines.
Experience in driving innovative solutions to complex design challenges.
Passion for continuous learning and staying current with advancements in SoC design methodologies and technologies.
Join us to push the boundaries of technology and make a lasting impact on the future of computing.
Job Type: Experienced Hire
Shift: Shift 1 (United States of America)
Primary Location: US, California, Santa Clara
Additional Locations: US, California, Folsom

Application prep

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Platform: workday
Effort: long