Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE: The focus of this role is to plan, build, and execute the implementation of new and existing features for AMD’s programmable embedded IP, resulting in final designs that meet product defined power, performance, and area targets with intended functionality that operates on silicon and is modeled accurately for customer design use .      THE PERSON:   You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/ timezones . You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems.   KEY RESPONSIBILITIES:   • Collaborate with architects, hardware engineers, and software engineers to understand the new features to be implemented • Author implementation documentation, accounting for interactions with other features, the hardware, and the software modeling use cases • Estimate the time required to implement the new features, collaborate with design verification test development, and any execute required changes based on cross functional feedback • Build the directed and random verification tests • Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues   • Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements   PREFERRED EXPERIENCE:   • Proficient in IP level RTL implementation • Proficient in debugging RTL code using simulation tools   • Proficient in navigating UVM generated test results and working in Linux and Windows environment s • Experienced with Verilog and System Verilog  • Strong understanding of circuit design concepts, translating circuit designs in an optimal way to either custom implementations or with best practices for RTL synthesis  • Automating workflows in a distributed compute environment .     • Proficient in analytical problem solving, specifically with troubleshooting component designs (e.g., timing analysis, constraint setting) • Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process • Strong background in developing and verifying SAPR constraints • Good understanding and hands-on experience in UPF concepts • Good working knowledge of clocking, reset, and power domain crossings with some related experience .     • Scripting language experience: Python, Perl, Ruby, Makefile , shell preferred.    • Exposure to leadership or mentorship is an asset • Experience with circuit macro generation, characterization, and collateral release processes • Desirable assets with prior exposure to high speed interfaces       ACADEMIC CREDENTIALS:   • Bachelors or Masters degree in computer engineering/Electrical Engineering This role is not eligible for visa sponsorship. #LI-CJ3 Benefits offered are described: AMD benefits at a glance . AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Requirements

Must-haves

Collaborate with architects, hardware engineers, and software engineers to understand the new features to be implemented
Author implementation documentation, accounting for interactions with other features, the hardware, and the software modeling use cases
Estimate the time required to implement the new features, collaborate with design verification test development, and any execute required changes based on cross functional feedback
Build the directed and random verification tests
Debug test failures to determine the root cause; work with RTL and firmware engineers to resolve design defects and correct any test issues
Review functional and code coverage metrics – modify or add tests or constrain random tests to meet the coverage requirements
Bachelors or Masters degree in computer engineering/Electrical Engineering
Benefits offered are described: AMD benefits at a glance .
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here.
This posting is for an existing vacancy.

Nice-to-haves

Proficient in IP level RTL implementation
Proficient in debugging RTL code using simulation tools
Proficient in navigating UVM generated test results and working in Linux and Windows environment s
Experienced with Verilog and System Verilog
Strong understanding of circuit design concepts, translating circuit designs in an optimal way to either custom implementations or with best practices for RTL synthesis
Automating workflows in a distributed compute environment .
Proficient in analytical problem solving, specifically with troubleshooting component designs (e.g., timing analysis, constraint setting)
Exposure to simulation profile, efficiency improvement, acceleration, HLS tools/process
Strong background in developing and verifying SAPR constraints
Good understanding and hands-on experience in UPF concepts
Good working knowledge of clocking, reset, and power domain crossings with some related experience .
Scripting language experience: Python, Perl, Ruby, Makefile , shell preferred.

Application prep

Use the role’s language and application details while tailoring your materials.

Keywords to mirror

aipython

Platform: amd
Effort: medium