Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. THE ROLE You will join the system software architecture team behind AMD Instinct™ accelerators, the GPUs powering some of the world's largest AI and HPC deployments. This role is focused on next-generation, rack-scale AI platforms in the MI400 class spanning the GPU, the node, and the scale-up/scale-out fabric that binds thousands of accelerators into a single training and inference system. THE PERSON As a Systems Software Architect, you sit at the intersection of silicon, firmware, driver, runtime, and framework. You define how the software stack exposes and orchestrates the hardware so that AMD's largest customers can extract maximum performance, reliability, and utilization from their infrastructure. KEY RESPONSIBILITIES • Own the end-to-end system software architecture for one or more MI400-class subsystems for example GPU memory management, scheduling and queuing, RAS and serviceability, virtualization/partitioning (SR-IOV), or the scale-up/scale-out interconnect software model. • Drive architecture across the stack: kernel-mode driver (amdgpu/KFD), user-mode runtime (ROCr/HSA), firmware interfaces, and the ROCm software platform, ensuring the layers compose cleanly and perform. • Partner with silicon and SoC architects during pre-silicon definition to shape hardware/software interfaces, programming models, and register/firmware contracts before tape-out. • Define the software strategy for multi-GPU and rack-scale topologies, including Infinity Fabric / UALink-style interconnect, collective communication (RCCL), memory coherence, and address translation across the platform. • Establish architecture for reliability, availability, and serviceability at scale, error detection, containment, telemetry, recovery, and graceful degradation across large clusters. • Set direction on performance: identify bottlenecks in the launch path, memory subsystem, and communication path, and define the software mechanisms to close them. • Produce architecture specifications, reference designs, and design reviews that align firmware, driver, runtime, and framework teams onto a shared plan. • Act as a technical anchor across AMD and with strategic hyperscale and AI customers — translating their workload requirements into architectural direction and representing AMD in deep technical engagements. PREFERRED EXPERIENCE • Linux Memory Management and Heterogeneous Memory Management (HMM). • GPU / DRM driver development. • Cache coherence and memory consistency protocols. • GPU Networking technologies including including scale up transport, NVLink, UALink, RDMA, and peer-direct. • Scale-up and scale-out networking, and communication collectives (e.g., RCCL/NCCL), MPI, or SHMEM. • Data-center fabrics such as Infinity Fabric, UALink, Ultra Ethernet, InfiniBand, and RoCE, with topology-aware software. DESIRABLE EXPERIENCE • Direct experience with the ROCm stack, AMD Instinct, CUDA, or comparable GPU compute ecosystems. • Hands-on experience developing or optimizing GPU compute kernels (HIP, CUDA, Triton, or assembly-level tuning). • Experience with deep learning frameworks like PyTorch and TensorFlow in particular including framework integration, custom operators, and performance tuning on GPU backends. • Familiarity with the broader ML framework and compiler ecosystem (PyTorch, JAX, TensorFlow, ONNX, MLIR/compiler stacks). • Hands-on experience with GPU compute technologies such as OpenCL and Vulkan. • Familiarity with AI/ML training and inference workloads (transformers, large-scale distributed training, KV-cache and memory pressure, inference serving). • Background in virtualization, multi-tenancy, confidential computing, or cloud GPU provisioning. • Contributions to open-source kernel, driver, or runtime projects. ACADEMIC CREDENTIALS: • Bachelor ’ s or Master ’ s in Electrical Engineer, Computer Engineering, Computer Science, or a closely related field LOCATION: Austin, TX Santa Clara, CA This role is not eligible for visa sponsorship. #LI-BW2 Benefits offered are described: AMD benefits at a glance . AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process. AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD’s “Responsible AI Policy” is available here. This posting is for an existing vacancy.

Requirements

Must-haves

Drive architecture across the stack: kernel-mode driver (amdgpu/KFD), user-mode runtime (ROCr/HSA), firmware interfaces, and the ROCm software platform, ensuring the layers compose cleanly and perform.
Partner with silicon and SoC architects during pre-silicon definition to shape hardware/software interfaces, programming models, and register/firmware contracts before tape-out.
Define the software strategy for multi-GPU and rack-scale topologies, including Infinity Fabric / UALink-style interconnect, collective communication (RCCL), memory coherence, and address translation across the platform.
Establish architecture for reliability, availability, and serviceability at scale, error detection, containment, telemetry, recovery, and graceful degradation across large clusters.
Set direction on performance: identify bottlenecks in the launch path, memory subsystem, and communication path, and define the software mechanisms to close them.
Produce architecture specifications, reference designs, and design reviews that align firmware, driver, runtime, and framework teams onto a shared plan.
Act as a technical anchor across AMD and with strategic hyperscale and AI customers — translating their workload requirements into architectural direction and representing AMD in deep technical engagements.
Direct experience with the ROCm stack, AMD Instinct, CUDA, or comparable GPU compute ecosystems.
Hands-on experience developing or optimizing GPU compute kernels (HIP, CUDA, Triton, or assembly-level tuning).
Experience with deep learning frameworks like PyTorch and TensorFlow in particular including framework integration, custom operators, and performance tuning on GPU backends.
Familiarity with the broader ML framework and compiler ecosystem (PyTorch, JAX, TensorFlow, ONNX, MLIR/compiler stacks).
Hands-on experience with GPU compute technologies such as OpenCL and Vulkan.
Familiarity with AI/ML training and inference workloads (transformers, large-scale distributed training, KV-cache and memory pressure, inference serving).
Background in virtualization, multi-tenancy, confidential computing, or cloud GPU provisioning.
Contributions to open-source kernel, driver, or runtime projects.
Bachelor ’ s or Master ’ s in Electrical Engineer, Computer Engineering, Computer Science, or a closely related field
Santa Clara, CA
Benefits offered are described: AMD benefits at a glance .

Nice-to-haves

Linux Memory Management and Heterogeneous Memory Management (HMM).
GPU / DRM driver development.
Cache coherence and memory consistency protocols.
GPU Networking technologies including including scale up transport, NVLink, UALink, RDMA, and peer-direct.
Scale-up and scale-out networking, and communication collectives (e.g., RCCL/NCCL), MPI, or SHMEM.
Data-center fabrics such as Infinity Fabric, UALink, Ultra Ethernet, InfiniBand, and RoCE, with topology-aware software.

Application prep

Use the role’s language and application details while tailoring your materials.

Keywords to mirror

aiml

Platform: amd
Effort: medium

Benefits

Benefits detected in the listing.

Vision