Imagine yourself at the center of our SOC design effort, collaborating with all disciplines, playing a strategic role of getting functional products to millions of customers quickly. You will have the opportunity to integrate and come-up with new ideas, as well as work with a team of talented engineers.
As a Library Design Engineering Lead for the custom circuits team, you will perform the following: Lead & mentor small team of highly talented circuit design engineers & provide technical guidance
Drive design, development and characterization/QA of high performance, low power standard cells to improve chip design PPA.
Drive development of power management cell designs that cater to Apple’s Low Power product requirements.
Identify next generation of new ideas to drive PPA improvements further engage with CPU, SOC and GPU teams on chip level integration requirements.
Drive library checks & analysis, develop new methodologies based on new design requirements.
Work with foundry on new technology requirements, drive layout dependent design optimization and layout checks.
Manage migration to new PDK, PDV of standard cells & releases
Support and drive cellular library requirements. Engage with cellular teams to understand specific design needs and cater to those requirements.
BS and a minimum of 10 years of relevant industry experience.
We are looking for applicants with 10+ years of experience in Standard cells library development.
Master's Degree preferred
Proven experience in developing, driving & implementing design methodologies
Proven experience leading and mentoring a small team
Strong influence, excellent interpersonal skills & able to work with multi-functional teams
Knowledge of standard cell layout, DRM, DRC/LVS decks, PDV flows, Virtuoso.
Design experience in advanced tech node device behavior with understanding of layout rules.
Design experience in flop, complex Standard Cells design & Power Management Cells.
Knowledge of agentic flows, familiarity with AI drive design optimization, checks, flows.