Job Details
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Sector:
engineering
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Type:
Permanent
Working Arrangement: On-site
Location: San Francisco Bay Area, California
Salary: $200K/yr - $250K/yr
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We’re seeking a Digital IP Design Engineer to design, develop, and verify digital IP for next-generation semiconductor products, contributing to the architecture and development of complex digital control systems .
What You’ll Do
• Design, develop, and verify digital IP for next-generation semiconductor products
• Contribute to the architecture and development of complex digital control systems
• Own portions of the design process, including architecture, RTL implementation, interfaces, and integration
• Develop and integrate behavioral and functional models to support design and verification
• Collaborate with circuit and system engineers to ensure seamless integration between hardware blocks
• Develop and execute verification strategies for digital designs and system models
• Participate in design reviews and contribute to improving RTL design practices, methodologies, and processes
• Work closely with cross-functional engineering teams to define architectures, interfaces, and system requirements
• Support chip-level simulation, integration, debugging, and validation activities
What You’ll Bring
• MS or Ph.D. in Electrical Engineering, Computer Engineering, or a related field, with 4+ years of industry experience in digital design, RTL, microarchitecture, or architecture development
• Strong hands-on experience with RTL design and digital simulation
• Experience working with memory, control, or other complex digital subsystems is a plus
• Understanding of computer architecture fundamentals and hardware/software interfaces
• Experience with modeling and simulation using languages such as Python, Verilog-A, SystemVerilog, or related tools
• Proficiency in Verilog/SystemVerilog and solid RTL coding practices
• Familiarity with digital implementation concepts, timing constraints, and EDA development flows
• Experience with simulation, synthesis, linting, static timing analysis, and related EDA tools
• Ability to debug complex hardware designs and work across multiple levels of abstraction
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