Job description

FPGA Engineer • 3+ years of experience developing SDR solutions (Software Defined Radio) • Linux experience • VHDL programming experience • FPGA Toolchains (Vivado or Quartus) expérience • Basic Git, SVN, or Mercurial experience for version control • Active Secret Clearance (Top Secret/SCI a plus) • Strong written and spoken communication skills with the ability to discuss complex topics in detail Pluses • BS or MS in Electrical, Computer Engineering or related Science, Engineering, Technology, Mathematics Field • RF communications experience • Ability to work with RF test equipment: Spectrum Analyzer, RSA, Vector Waveform Generator • Beginner/Intermediate experience with C, Python • Intermediate/Advanced experience in VHDL • Experience with FPGA software debugging tools using JTAG (ChipScope or SignalTap) • Research: • Conduct research on signal processing techniques, communication protocols, and hardware design methodologies. • Stay up to date with industry trends and advancements in FPGA and SDR technologies to inform design decisions and improve system performance. • Design: • Develop high-level architectures and create internal design documents to guide the engineering process and testing. • Research and implement algorithms to meet system requirements, using appropriate tools and methodologies. • Collaborate with team members to gather requirements and translate them into a working design. • Development: • Write and optimize VHDL/Verilog code, leveraging internal libraries or creating custom components and finite state machines (FSMs). • Develop software applications to support FPGA/SDR functionality, including configuration, control, and data processing. • Ensure compliance with team’s coding standards and best practices. • Simulation and Testing: • Debug, test, and optimize designs across various environments to ensure functionality and performance by simulating and deploying designs to hardware. • Collaborate with field engineers to support final testing and validation efforts. Salary range of $130-$180k Depending on experience and fit Summary of Coverage • Paid Leave - Four weeks of PTO (vacation/sick time) • 100% Employer-paid premiums for Medical, Dental, Vision, and Prescription Drug plans • Employer funded HRA ($2K single/$4K family) • Employer-paid Life Insurance ($100K) • Employer-paid Short-Term and Long-Term Disability Plans • Paid Holidays (11 per year) • 401K Plan (contributions matched up to 4% of salary, immediately vested) • Bonus Plan (historically paid at least once per year) • Employee Referral Bonus Plan • Employee Tuition Reimbursement Plan

Requirements

Must-haves

FPGA Engineer
3+ years of experience developing SDR solutions (Software Defined Radio)
Linux experience
VHDL programming experience
FPGA Toolchains (Vivado or Quartus) expérience
Basic Git, SVN, or Mercurial experience for version control
Strong written and spoken communication skills with the ability to discuss complex topics in detail
Conduct research on signal processing techniques, communication protocols, and hardware design methodologies.
Stay up to date with industry trends and advancements in FPGA and SDR technologies to inform design decisions and improve system performance.
Develop high-level architectures and create internal design documents to guide the engineering process and testing.
Research and implement algorithms to meet system requirements, using appropriate tools and methodologies.
Collaborate with team members to gather requirements and translate them into a working design.
Write and optimize VHDL/Verilog code, leveraging internal libraries or creating custom components and finite state machines (FSMs).
Develop software applications to support FPGA/SDR functionality, including configuration, control, and data processing.
Ensure compliance with team’s coding standards and best practices.

Nice-to-haves

Active Secret Clearance (Top Secret/SCI a plus)
BS or MS in Electrical, Computer Engineering or related Science, Engineering, Technology, Mathematics Field
RF communications experience
Ability to work with RF test equipment: Spectrum Analyzer, RSA, Vector Waveform Generator
Beginner/Intermediate experience with C, Python
Intermediate/Advanced experience in VHDL
Experience with FPGA software debugging tools using JTAG (ChipScope or SignalTap)
Bonus Plan (historically paid at least once per year)
Employee Referral Bonus Plan

Application prep

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Keywords to mirror

python

Platform: catsone
Effort: medium

Benefits

Benefits detected in the listing.

Dental

Vision

401k

Pto