Job description

HPR is a leading provider of high-performance and ultra-low latency electronic trading and capital markets infrastructure solutions offered as a managed service. Our cutting-edge technology is used by tier-1 financial institutions to monitor and execute trades rapidly and efficiently. As we continue to innovate and grow, we’re searching for a forward-thinking Senior Design Verification Engineer to help us build the future of capital markets infrastructure. As a Senior Design Verification Engineer at HPR, you will: Verify and maintain high-performance FPGA compute and networking systems used in electronic trading Own the verification process from specification, test planning, and testbench development through execution and coverage closure Partner with design engineers to review and execute comprehensive test plans Create and maintain reusable verification components and testbenches written in SystemVerilog Lead and mentor junior engineers, promoting our culture of continuous learning and collaboration Contribute to improving our verification processes, tools, and methodologies Required Qualifications BS/MS in Computer Engineering, Electrical Engineering, Computer Science, or related 5+ years of experience in design verification for FPGAs or ASICs Proficiency in SystemVerilog for verification Familiarity with advanced verification methods, including constrained randomization, functional coverage, and assertion-based checking Experience with industry-standard simulation and debugging tools (e.g., VCS, Verdi) Comfortable working in a Linux environment Strong problem solving, debugging, and communication skills Desired Qualifications Deep understanding of computer architecture and digital design concepts In-depth knowledge of networking protocols (IP, TCP, UDP) Experience verifying designs with high-speed interfaces (PCIe, Ethernet, and/or DDR) Familiarity with C programming and scripting in Python and/or Perl Compensation: In compliance with Massachusetts law, the anticipated annual base salary range for this position is $112,000 to $280,000. Please note that this range represents the expected base salary for this role at the time of posting. The final offer may vary based on factors such as the candidate's experience, skills, and qualifications. This range does not include other forms of compensation such as potential bonuses, equity, or benefits. This position requires being on-site at our office in Needham, MA full-time (5 days per week). Hyannis Port Research is an Equal Opportunity Employer and is committed to providing a workplace free from discrimination and harassment. All employment decisions are made without regard to any characteristic protected by applicable federal, state, or local law. We are committed to providing reasonable accommodations to qualified individuals with disabilities throughout the application and hiring process and during employment, consistent with applicable law. Applicants who require an accommodation to participate in the application or interview process or will require accommodation if hired should contact us via the "Connect With Us" button on our Careers page.

Requirements

Must-haves

As a Senior Design Verification Engineer at HPR, you will:
Verify and maintain high-performance FPGA compute and networking systems used in electronic trading
Own the verification process from specification, test planning, and testbench development through execution and coverage closure
Partner with design engineers to review and execute comprehensive test plans
Create and maintain reusable verification components and testbenches written in SystemVerilog
Lead and mentor junior engineers, promoting our culture of continuous learning and collaboration
Contribute to improving our verification processes, tools, and methodologies
BS/MS in Computer Engineering, Electrical Engineering, Computer Science, or related
5+ years of experience in design verification for FPGAs or ASICs
Proficiency in SystemVerilog for verification
Familiarity with advanced verification methods, including constrained randomization, functional coverage, and assertion-based checking
Experience with industry-standard simulation and debugging tools (e.g., VCS, Verdi)
Comfortable working in a Linux environment
Strong problem solving, debugging, and communication skills

Nice-to-haves

Deep understanding of computer architecture and digital design concepts
In-depth knowledge of networking protocols (IP, TCP, UDP)
Experience verifying designs with high-speed interfaces (PCIe, Ethernet, and/or DDR)
Familiarity with C programming and scripting in Python and/or Perl
This position requires being on-site at our office in Needham, MA full-time (5 days per week).

Application prep

Use the role’s language and application details while tailoring your materials.

Keywords to mirror

python

Platform: greenhouse
Effort: quick