Job description

The Hardware team at Hudson River Trading (HRT) creates high performance compute engines using FPGA and ASIC technologies to drive low latency trading decisions on global markets. We build custom solutions across the spectrum of speed and smarts: from bespoke circuits to world-class machine learning accelerators. FPGAs and ASICs are critical pieces of our technology stack. We are looking for talented hardware developers to architect and design complex systems on a highly collaborative global team. In this role, you'll identify efficient ways to perform on-the-fly transformations of market data and implement models with complex data structures in RTL. You’ll work with FPGA, ASIC, or both technologies as a member of our integrated team. No previous financial experience is necessary! Responsibilities Contribute to a highly collaborative team, working closely with others to deliver hardware solutions Describe and communicate hardware designs at a high level (the interface), low level (step-by-step algorithm/circuit), or anywhere in between Analyze and fix problems quickly Continuously learn, tinker, and explore new technologies to deepen your hardware expertise Challenge your teammates and raise the bar for the work the team produces Qualifications Currently pursuing a Bachelor's, Masters, or PhD in Computer Science, Computer Engineering, Electrical Engineering, or a related discipline, with eligibility for full-time employment in 2027 Proficiency in SystemVerilog Deep knowledge of FPGA internals and/or ASIC Excellent digital logic design, optimization, debugging and problem solving skills Thorough understanding of computer architecture and vendor tool suites Familiarity with C++ and/or Python Comfortable working in a Linux environment Previous internship experience in digital logic design Expertise in networking protocols, CPU design, physical design, or machine learning accelerators is a big plus Hardware Design and Verification at HRT HRT hires for both design and verification roles. There is often overlap in skills, and both teams work together very closely. Design engineers typically have training in computer architecture and digital logic design, and they are primarily focused on creating hardware in SystemVerilog. Verification engineers typically have training in both digital logic and software engineering, and are primarily focused on building complex modeling and testing environments in Python and C++. If you are interested, you can view our Design Verification (DV) Engineer - 2027 Grads posting here . We do not allow multiple applications. Please apply to the ONE role you are most interested in and we will consider you for all open positions when reviewing your application. The estimated base salary range for this position is 300,000 USD per year (or local equivalent). The base pay offered may vary depending on multiple individualized factors, including location, job-related knowledge, skills, and experience. This role will also be eligible for discretionary performance-based bonuses and a competitive benefits package. Culture Hudson River Trading (HRT) brings a scientific approach to trading financial products. We have built one of the world's most sophisticated computing environments for research and development. Our researchers are at the forefront of innovation in the world of algorithmic trading. At HRT we welcome a variety of expertise: mathematics and computer science, physics and engineering, media and tech. We’re a community of self-starters who are motivated by the excitement of being at the cutting edge of automation in every part of our organization—from trading, to business operations, to recruiting and beyond. We value openness and transparency, and celebrate great ideas from HRT veterans and new hires alike. At HRT we’re friends and colleagues – whether we are sharing a meal, playing the latest board game, or writing elegant code. We embrace a culture of togetherness that extends far beyond the walls of our office. Feel like you belong at HRT? Our goal is to find the best people and bring them together to do great work in a place where everyone is valued. HRT is proud of our diverse staff; we have offices all over the globe and benefit from our varied and unique perspectives. HRT is an equal opportunity employer; so whoever you are we’d love to get to know you. Please be advised: Use of AI tools by an applicant during interviews or assessments is strictly prohibited, unless otherwise instructed or agreed upon. We employ various methods to evaluate the authenticity of candidate responses. If we determine that AI assistance was used by an applicant during an interview or an assessment, we reserve the right to immediately end the interview or assessment, disqualify the applicant’s candidacy and/or rescind any job offers extended. You can review our Global Applicant Privacy Notice , which explains how we process applicant information.

Requirements

Must-haves

Contribute to a highly collaborative team, working closely with others to deliver hardware solutions
Describe and communicate hardware designs at a high level (the interface), low level (step-by-step algorithm/circuit), or anywhere in between
Analyze and fix problems quickly
Continuously learn, tinker, and explore new technologies to deepen your hardware expertise
Challenge your teammates and raise the bar for the work the team produces
Currently pursuing a Bachelor's, Masters, or PhD in Computer Science, Computer Engineering, Electrical Engineering, or a related discipline, with eligibility for full-time employment in 2027
Proficiency in SystemVerilog
Deep knowledge of FPGA internals and/or ASIC
Excellent digital logic design, optimization, debugging and problem solving skills
Thorough understanding of computer architecture and vendor tool suites
Familiarity with C++ and/or Python
Comfortable working in a Linux environment
Previous internship experience in digital logic design
Expertise in networking protocols, CPU design, physical design, or machine learning accelerators is a big plus
Hardware Design and Verification at HRT
We do not allow multiple applications. Please apply to the ONE role you are most interested in and we will consider you for all open positions when reviewing your application.
You can review our Global Applicant Privacy Notice , which explains how we process applicant information.

Nice-to-haves

None flagged.

Application prep

Use the role’s language and application details while tailoring your materials.

Keywords to mirror

machine learningpythonai

Platform: greenhouse
Effort: quick