Job description

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. In this role, you will collaborate with cross-functional experts to push the limits of performance for high-speed validation. You will play a key role in bringing Google's most advanced hardware to life. Our Platforms Infrastructure Engineering team designs and builds the hardware and software technologies that power all of Google's services. Our computational challenges are complex and unique, enabled by cutting-edge custom hardware designed and made in-house. As a hardware engineer, you will design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You will see those systems from concept all the way through to high-volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers, affecting millions of Google users.Individual pay is determined by factors including job-related skills, experience, and relevant education or training. US: $132000 - $189000 (USD) + 15% bonus target + equity + benefits Learn more about benefits at Google . • Design and deliver high-complexity Printed Circuit Board Assembly (PCBA) characterization boards, breakout fixtures, and lab test rigs to support advanced Serializer/Deserializer (SerDes) validation. • Own end-to-end board hardware development, including component selection, schematic capture (Cadence Concept HDL/OrCAD), stackup definition, and layout routing constraints. • Work in tight partnership with Signal Integrity (SI) and Power Integrity (PI) teams to optimize high-frequency trace routing, via transitions, connector launches, and Power Delivery Network (PDN) performance up to millimeter-wave frequencies. • Manage board fabrication and assembly with manufacturing partners, driving Design for Manufacturability (DFM)/Design for Assembly (DFA) reviews and resolving technical issues to guarantee on-time delivery. • Perform initial hardware bring-up, power sequencing verification, and passive/active fixture characterization in the lab using VNAs and TDRs. • Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience. • 2 years of experience in high-speed PCB hardware design, schematic capture, and layout oversight. • Experience with EDA design tools (e.g., Cadence Allegro, Altium, or equivalent) and lab bring-up equipment. Minimum qualifications: • Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience. • 2 years of experience in high-speed PCB hardware design, schematic capture, and layout oversight. • Experience with EDA design tools (e.g., Cadence Allegro, Altium, or equivalent) and lab bring-up equipment. Preferred qualifications: • Master's degree or PhD in Electrical Engineering, Computer Engineering, Physics, or a related field. • Experience designing high layer count PCBAs, RF/microwave fixtures, or silicon characterization load boards. • Working knowledge of high frequency PCB materials (e.g., Megtron, Tachyon, PTFE), high-speed connectors (e.g., 1.85mm, 2.4mm, compression RF connectors), and PCB fabrication tolerances. • Familiarity with high frequency S-parameter measurements using VNAs and TDRs for fixture impedance and loss verification. • Strong organizational skills to manage multiple board spins simultaneously.

Requirements

Must-haves

In this role, you will collaborate with cross-functional experts to push the limits of performance for high-speed validation. You will play a key role in bringing Google's most advanced hardware to life.
Our Platforms Infrastructure Engineering team designs and builds the
Learn more about benefits at Google .
Design and deliver high-complexity Printed Circuit Board Assembly (PCBA) characterization boards, breakout fixtures, and lab test rigs to support advanced Serializer/Deserializer (SerDes) validation.
Own end-to-end board hardware development, including component selection, schematic capture (Cadence Concept HDL/OrCAD), stackup definition, and layout routing constraints.
Manage board fabrication and assembly with manufacturing partners, driving Design for Manufacturability (DFM)/Design for Assembly (DFA) reviews and resolving technical issues to guarantee on-time delivery.
Perform initial hardware bring-up, power sequencing verification, and passive/active fixture characterization in the lab using VNAs and TDRs.
Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
2 years of experience in high-speed PCB hardware design, schematic capture, and layout oversight.
Experience with EDA design tools (e.g., Cadence Allegro, Altium, or equivalent) and lab bring-up equipment.
Bachelor’s degree in Electrical Engineering, Computer Engineering, Physics, a related field, or equivalent practical experience.
2 years of experience in high-speed PCB hardware design, schematic capture, and layout oversight.
Experience with EDA design tools (e.g., Cadence Allegro, Altium, or equivalent) and lab bring-up equipment.

Nice-to-haves

US: $132000 - $189000 (USD) + 15% bonus target + equity + benefits
Master's degree or PhD in Electrical Engineering, Computer Engineering, Physics, or a related field.
Experience designing high layer count PCBAs, RF/microwave fixtures, or silicon characterization load boards.
Working knowledge of high frequency PCB materials (e.g., Megtron, Tachyon, PTFE), high-speed connectors (e.g., 1.85mm, 2.4mm, compression RF connectors), and PCB fabrication tolerances.
Familiarity with high frequency S-parameter measurements using VNAs and TDRs for fixture impedance and loss verification.
Strong organizational skills to manage multiple board spins simultaneously.

Application prep

Use the role’s language and application details while tailoring your materials.

Platform: google
Effort: medium