Job description

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: The ASIC Product Division in Broadcom, a leading supplier of state-of-the-art SoC and embedded IP, is looking for qualified individuals to work in SoC and IP development programs. The candidate will be joining a high performance design team responsible for state-of-the-art SoC development to meet customer requirements for AI and storage chips. This is an exciting opportunity to develop new ideas, design the next generation of leading-edge products, and work on the most advanced technologies in the industry. Responsibilities: Participate in defining the overall SOC architecture and integrating IP Ensure quality design through detailed design analysis using leading edge tools Lead the extended team to support simulation, synthesis, formal verification, constraint definition, and validation of design Collaborate with Internal and External teams to enable customer success Refine solution by consulting with layout and DFT engineers to optimize area, performance and yield Generate collateral to support an SoC release including design specifications Skills and Experience: Experience with SOC architecture using AMBA interconnect, multiple processors and a variety of IO interfaces from basic UART to high speed DRAM with multiple lanes of high speed SERDES Excellent communication and cross-functional collaboration skills usage of cloud based documentation Ability to analyze complex trade-offs and make data-driven decisions Demonstrated expertise in HDL languages Verilog/VHDL and SystemVerilog Strong understanding of physical implementation and timing closure with process variation Must have legal authorization to work in the US. This position does not have funding to support company-sponsored immigration support. Education/Experience: Bachelors in Engineering (EE, CE, or CS preferred) and 8 years of related experience; OR Masters degree in Engineering and 6 years of related experience. Compensation and Benefits The annual base salary range for this position is USD 109,700.00 To USD 175,500.00 As a valued member of our team, you ll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company s growth. All subject to relevant plan documents and award agreements. Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence. Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law. If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Requirements

Must-haves

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This is an exciting opportunity to develop new ideas, design the next generation of leading-edge products, and work on the most advanced technologies in the industry.
Participate in defining the overall SOC architecture and integrating IP
Ensure quality design through detailed design analysis using leading edge tools
Lead the extended team to support simulation, synthesis, formal verification, constraint definition, and validation of design
Collaborate with Internal and External teams to enable customer success
Refine solution by consulting with layout and DFT engineers to optimize area, performance and yield
Generate collateral to support an SoC release including design specifications
Experience with SOC architecture using AMBA interconnect, multiple processors and a variety of IO interfaces from basic UART to high speed DRAM with multiple lanes of high speed SERDES
Excellent communication and cross-functional collaboration skills usage of cloud based documentation
Ability to analyze complex trade-offs and make data-driven decisions
Demonstrated expertise in HDL languages Verilog/VHDL and SystemVerilog
Strong understanding of physical implementation and timing closure with process variation
Must have legal authorization to work in the US. This position does not have funding to support company-sponsored immigration support.

Nice-to-haves

Bachelors in Engineering (EE, CE, or CS preferred) and 8 years of related experience; OR Masters degree in Engineering and 6 years of related experience.

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Platform: workday
Effort: long

Benefits

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Dental

Vision

401(K)