Job description

• Deliver high-quality digital design and verification across all programs (schedule, performance, silicon success) • Achieve predictable execution with early risk identification and strong mitigation frameworks • Improve first-pass silicon success rate through disciplined verification and robust design practices • Enable faster time-to-market through reuse, automation, and methodology standardization • Build the site into a self-sufficient digital & verification hub, reducing dependency on external sites Responsibility • Own end-to-end digital design and verification delivery for the site • Establish and drive verification strategy (simulation, formal, AMS/DMS) as a coherent, evolving plan • Own digital architecture quality, including system control logic, FSM design, FW interfaces, and IP reuse • Define and enforce sign-off criteria, including coverage, closure metrics, and design quality gates • Align digital and verification execution with product roadmap, customer requirements, and business priorities Direction (Strategic Leadership) • Define a clear multi-year vision for digital and verification capabilities at the site • Translate business and product strategy into technical roadmap and capability investments • Drive adoption of best-in-class methodologies, tools, and automation frameworks • Continuously adapt strategy based on execution gaps, competitive pressure, and program risk • Elevate the role from task execution to systemic impact and organizational leverage Alignment (Influence & Collaboration) • Lead cross-functional alignment with analog, system, FW, product, and test teams • Act as the primary the site interface for digital and verification in global reviews • Align with other sites on IP reuse, methodology standardization, and sign-off practices • Build strong partnerships with product line managers to ensure design meets system and market needs • Ensure seamless integration across global teams for multi-site program delivery Core Responsibilities Technical & Architecture Leadership • Guide architecture decisions for digital control systems, power management FSMs, and system interfaces • Ensure robust design practices across: • RTL quality (coding standards, lint, CDC) • Timing closure (STA, constraints) • DFT/scan and test readiness • Drive design reuse strategy to improve productivity and consistency Verification Excellence • Establish a world-class DV capability including: • Coverage-driven verification • SystemVerilog/UVM environments • Formal verification where applicable • AMS/DMS co-simulation for mixed-signal validation • Define verification plans that ensure full coverage and sign-off confidence • Drive automation and regression efficiency to scale execution Execution & Delivery • Own delivery across all digital and DV activities with clear accountability • Drive execution rigor: • Milestone planning • Risk tracking and mitigation • Transparent status reporting • Ensure consistent on-time tape-out with high-quality silicon Organization & Talent • Build and scale a high-performing digital & verification team • Define roles, expectations, and career progression aligned with job leveling frameworks • Develop technical leaders and mentors to increase organizational leverage • Drive hiring, retention, and capability growth aligned with site strategy Methodology & Continuous Improvement • Institutionalize standardized design and verification flows • Drive continuous improvements in: • Productivity (reuse, automation) • Quality (coverage, bug escape reduction) • Efficiency (cycle time reduction) • Promote a culture of data-driven decision making and engineering rigor Expected Impact • The site becomes a strategic execution hub for mixed-signal digital and verification • Significant improvement in execution predictability and silicon success • Increased engineering productivity without proportional headcount growth • Strong pipeline of technical leaders and scalable expertise • Enhanced customer confidence and competitive positioning Profile & Leadership Bar • Proven leader in digital IC design and/or verification at scale • Track record of delivering complex mixed-signal SoCs end-to-end • Deep expertise in: • RTL design, FSM/control logic • Verification methodologies (UVM, formal, AMS/DMS) • Ability to operate across strategy, system architecture, and execution simultaneously • Strong leadership presence with the ability to influence across global teams Renesas is an embedded semiconductor solution provider driven by its Purpose, To Make Our Lives Easier . With a global team of over 21,000 engineers and problem solvers in more than 30 countries, we offer the opportunity to work on world‑leading technology for Automotive, Industrial, Infrastructure, and IoT, shaping a safer, healthier, greener, and smarter future. At Renesas, TAGIE is our culture, grounded in being Transparent, Agile, Global, Innovative, and Entrepreneurial. It shapes how we work, grow and deliver on our purpose together. This collaborative spirit and mindset drive our semiconductor technology to transform industries and impact millions of lives. We believe in rewarding our employees with a competitive benefits package alongside their salary. More information will be provided during the hiring process. Are you ready to join our team and shape the future with us? Renesas Electronics is an equal opportunity and affirmative action employer, committed to supporting diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by law. For more information, please read our Diversity & Inclusion Statement . Renesas Electronics deals with dual-use technology that is subject to U.S. export controls regulations. Under these regulations it may be necessary for Renesas to obtain U.S. government export license prior to release of technology to certain persons. The decision whether or not to file or pursue an export license application is at the sole discretion of Renesas.

Requirements

Must-haves

Deliver high-quality digital design and verification across all programs (schedule, performance, silicon success)
Achieve predictable execution with early risk identification and strong mitigation frameworks
Improve first-pass silicon success rate through disciplined verification and robust design practices
Enable faster time-to-market through reuse, automation, and methodology standardization
Build the site into a self-sufficient digital & verification hub, reducing dependency on external sites
Responsibility
Own end-to-end digital design and verification delivery for the site
Establish and drive verification strategy (simulation, formal, AMS/DMS) as a coherent, evolving plan
Own digital architecture quality, including system control logic, FSM design, FW interfaces, and IP reuse
Define and enforce sign-off criteria, including coverage, closure metrics, and design quality gates
Align digital and verification execution with product roadmap, customer requirements, and business priorities
Direction (Strategic Leadership)
Define a clear multi-year vision for digital and verification capabilities at the site
Translate business and product strategy into technical roadmap and capability investments
Drive adoption of best-in-class methodologies, tools, and automation frameworks
Continuously adapt strategy based on execution gaps, competitive pressure, and program risk
Elevate the role from task execution to systemic impact and organizational leverage
Alignment (Influence & Collaboration)
Lead cross-functional alignment with analog, system, FW, product, and test teams
Act as the primary the site interface for digital and verification in global reviews
Align with other sites on IP reuse, methodology standardization, and sign-off practices
Build strong partnerships with product line managers to ensure design meets system and market needs
Ensure seamless integration across global teams for multi-site program delivery
Technical & Architecture Leadership

Nice-to-haves

None flagged.

Application prep

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Keywords to mirror

agile

Platform: smartrecruiters
Effort: medium

Benefits

Benefits detected in the listing.

Vision