Job description

Application close date: Applications will be accepted on an ongoing basis until the requisition is closed. At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight!  Blue Origin is pioneering the future of space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide. About the Role At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We re working to build a future where access to space is reliable, cost-effective, and routine. Joining our team means you ll be part of a mission-driven organization that values curiosity, collaboration, and bold thinking. We are seeking a talented and experienced Principal FPGA Designer to join our TeraWave program. In this role, you will provide technical leadership in the design, development, and verification of complex FPGA-based systems supporting high-speed data processing, communications, and signal processing applications. You will work in a dynamic, fast-paced environment where your contributions will directly shape next-generation space systems. As part of a small, nimble team, you must be comfortable working across disciplines and taking ownership of deliverables from concept through flight. We are looking for someone who shares our passion for our mission and is eager to achieve big things through technical excellence and collaboration. Responsibilities Lead FPGA designs through the full development lifecycle: requirements capture, architecture definition, RTL design, functional simulation, synthesis, place-and-route, timing closure, and hardware bring-up Comply with and refine FPGA design methodologies, coding standards, and best practices throughout the development process Develop and maintain comprehensive verification environments, including testbenches, constrained-random stimulus, and functional coverage models Partner closely with other program stakeholders to define interfaces and ensure end-to-end system performance Support hardware integration and troubleshooting efforts, including lab board bring-up and debug Conduct and participate in design reviews (preliminary, critical, and peer-level) and provide constructive technical feedback Mentor and develop junior and mid-level FPGA engineers; provide technical direction and foster a culture of engineering excellence Evaluate and select FPGA devices, IP cores, EDA tools, and vendor solutions to meet program requirements Contribute to program planning by providing accurate development estimates, identifying technical risks, and proposing opportunities and risk mitigation strategies Develop and maintain design documentation, interface control documents, and test plans in compliance with program configuration management standards Support qualification, acceptance testing, production and on-orbit operations as needed Include features to support DFT and DFM for a high-volume production environment Basic Qualifications Bachelor s degree in Electrical Engineering, Computer Engineering, or a related technical discipline 12 years of hands-on FPGA design and verification experience, with demonstrated leadership at a principal or senior level Proficiency in VHDL, Verilog and System Verilog for RTL design and simulation Experience with industry-standard FPGA families (AMD Versal, IGLOO and equivalent devices) Demonstrated experience with toolchains for synthesis, P&R, and timing analysis Strong understanding of high-speed digital design principles, including signal integrity, clock domain crossings, and SERDES-based interfaces (e.g., PCIe, GTH/GTY transceivers) Experience with digital signal processing (DSP) architectures implemented in FPGAs Familiarity with hardware/software co-design and embedded processor integration (e.g., AMD Versal devices) Demonstrated ability to close complex timing constraints and optimize resource utilization Experience with simulation and verification methodologies and tools Experience working in a structured engineering environment with configuration management, formal design reviews, and requirements traceability Strong written and verbal communication skills; ability to communicate complex technical concepts to diverse audiences Preferred Qualifications Master s degree or Ph.D. in Electrical Engineering, Computer Engineering, or related field Familiarity with space-grade design practices, including single-event effect (SEE) mitigation strategies such as TMR, scrubbing, and fault detection Experience with high-speed communications systems or modem development in FPGAs Hands-on experience with formal verification tools or UVM-based constrained-random verification environments Demonstrated experience mentoring, and technically developing FPGA engineers Previous experience in a space, defense, or satellite communications program environment Base Pay Range for: WA applicants is $249,235.00 - $348,928.65 Other site ranges may differ Culture Statement Don’t meet all desired requirements? Studies have shown that some people are less likely to apply to jobs unless they meet every single desired qualification. At Blue Origin, we are dedicated to building an authentic workplace, so if you’re excited about this role but your past experience doesn’t align perfectly with every desired qualification in the job description, we encourage you to apply anyway. You may be just the right candidate for this or other roles. Export Control Regulations Applicants for employment at Blue Origin must be a U.S. citizen or national, U.S. permanent resident (i.e. current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum. Background Check Required for all positions: Blue’s Standard Background Check Required for Certain Job Profiles: Defense Biometric Identification System (DBIDS) background check if at any time the role requires one to be on a military installation Required for Certain Job Profiles: Drivers who operate Commercial Motor Vehicles with a Gross Vehicle Weight (GVW), Gross Vehicle Weight Rating (GVWR) or combination of power unit and trailer that meets or exceeds 10,001 lbs. and/or transports placardable amounts of hazardous materials by ground in any vehicle on a public road while in commerce, may be subject to additional Federal Motor Carrier Safety Regulations including: Driver Qualification Files, Medical Certification (obtained before onboarding), Road Test, Hours of Service, Drug and Alcohol Testing, vehicle inspection requirements, CDL requirements (if applicable) and hazardous materials transportation/shipping training. Required for certain Job Profiles: Ability to obtain and maintain Merchant Mariner Credential, which includes pre-employment and random drug testing as well as DOT physical Benefits Benefits include: Medical, dental, vision, basic and supplemental life insurance, paid parental leave, short and long-term disability, 401(k) with a company match of up to 5%, and an Education Support Program. Stock Options for all regular employees (working at least 20 hours/week) Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours, and up to 14 company-paid holidays. Dependent on role type and job level, employees may be eligible for benefits and bonuses based on the company s intent to reward individual contributions and enable them to share in the company s results, or other factors at the company s sole discretion. Bonus amounts and eligibility are not guaranteed and subject to change and cancellation. Please check with your recruiter for more details. Equal Employment Opportunity Blue Origin is proud to be an Equal Opportunity/Affirmative Action Employer and is committed to attracting, retaining, and developing a highly qualified and dedicated work force. Blue Origin hires and promotes people on the basis of their qualifications, performance, and abilities. We support the establishment and maintenance of a workplace that fosters trust, equality, and teamwork. We provide all qualified applicants for employment and employees with equal opportunities for hire, promotion, and other terms and conditions of employment, regardless of their race, color, religion, sex, sexual orientation, gender identity, national origin/ethnicity, age, physical or mental disability, genetic factors, military/veteran status, or any other status or characteristic protected by federal, state, and/or local law. Blue Origin will consider for employment qualified applicants with criminal histories in a manner consistent with applicable federal, state, and local laws, including the Washington Fair Chance Act, the California Fair Chance Act, the Los Angeles Fair Chance in Hiring Ordinance, and other applicable laws. For more information on “Know Your Rights,” please see here . Affirmative Action and Disability Accommodation Applicants wishing to receive information on Blue Origin’s Affirmative Action Plans, or applicants requiring a reasonable accommodation in order to participate in the application and/or interview process, please contact us at EEOCompliance blueorigin.com . Please note this is a publicly managed inbox. Please do not include any personal medical information in your request.

Requirements

Must-haves

Applications will be accepted on an ongoing basis until the requisition is closed.
Lead FPGA designs through the full development lifecycle: requirements capture, architecture definition, RTL design, functional simulation, synthesis, place-and-route, timing closure, and hardware bring-up
Comply with and refine FPGA design methodologies, coding standards, and best practices throughout the development process
Develop and maintain comprehensive verification environments, including testbenches, constrained-random stimulus, and functional coverage models
Partner closely with other program stakeholders to define interfaces and ensure end-to-end system performance
Support hardware integration and troubleshooting efforts, including lab board bring-up and debug
Conduct and participate in design reviews (preliminary, critical, and peer-level) and provide constructive technical feedback
Mentor and develop junior and mid-level FPGA engineers; provide technical direction and foster a culture of engineering excellence
Evaluate and select FPGA devices, IP cores, EDA tools, and vendor solutions to meet program requirements
Contribute to program planning by providing accurate development estimates, identifying technical risks, and proposing opportunities and risk mitigation strategies
Develop and maintain design documentation, interface control documents, and test plans in compliance with program configuration management standards
Support qualification, acceptance testing, production and on-orbit operations as needed
Include features to support DFT and DFM for a high-volume production environment
Bachelor s degree in Electrical Engineering, Computer Engineering, or a related technical discipline
12 years of hands-on FPGA design and verification experience, with demonstrated leadership at a principal or senior level
Proficiency in VHDL, Verilog and System Verilog for RTL design and simulation
Experience with industry-standard FPGA families (AMD Versal, IGLOO and equivalent devices)
Demonstrated experience with toolchains for synthesis, P&R, and timing analysis

Nice-to-haves

Master s degree or Ph.D. in Electrical Engineering, Computer Engineering, or related field
Familiarity with space-grade design practices, including single-event effect (SEE) mitigation strategies such as TMR, scrubbing, and fault detection
Experience with high-speed communications systems or modem development in FPGAs
Hands-on experience with formal verification tools or UVM-based constrained-random verification environments
Demonstrated experience mentoring, and technically developing FPGA engineers
Previous experience in a space, defense, or satellite communications program environment

Application prep

Use the role’s language and application details while tailoring your materials.

Platform: workday
Effort: long

Benefits

Benefits detected in the listing.

Dental

Vision

401(K)

Paid Time Off

Parental Leave