Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology. As an integral member of the HSV Engagement/Support Team, you will work with our customers and field AE teams and R&D groups to provide technical support for our Palladium, Protium and Virtual Protocol (PDAPP) products. You will enjoy the experience and challenge in working with a broad spectrum of designs and customers. Responsibilities includes: Work with customers on performance tuning. Work with R&D in refining advanced compiler features. Train customers in deploying advanced compiler features. Handling issues reported by field AEs and customers. Handle critical accounts escalation (Customer in Distress - CID) process and work closely with R&D managers in resolving critical customer issues. Debug customer reported failures, produce test cases to replicate failure and log issues with HSV R&D teams. Recommend potential workaround or application level solutions to customers when necessary. Test R&D fixes/patches. Develop expertise in h/w and f/w and support HSV field service team for h/w and f/w related issues. Work with customer and internal groups to spec out enhancement requests. Testing new product features for future s/w releases or h/w platform, including participation in internal beta activities. Updating product training materials. Position Requirements: Requires a MS-EE/CE with 8 years of experience in design and/or verification of complex digital designs, or Applications engineering/technical support role. Strong knowledge of design debug techniques and a strong understanding in logic design. Strong knowledge of verification methodologies for complex EDA environments. Expertise in HDL language like Verilog, System Verilog and VHDL. Ability to create test cases to replicate customer issues quickly. Expertise in Unix/Linux scripting languages (ksh/bash/csh/perl). Expertise TBA, SV assertions/coverage, Low Power(CPF/UPF). UVM experience is a plus. Experience with emulation, Cadence s Palladium/Protium product preferred. Excellent communication skills. Must have ability to communicate complex issue to internal teams and customers in a clear and concise manner. Occasional travel may be required to resolve critical customer issues. Occasional travel, up to 10% (measured over the course of a rolling 12 month period), may be required to resolve critical customer issues. The annual salary range for California is $185,500 to $344,500. You may also be eligible to receive incentive compensation: bonus, equity, and benefits. Sales positions generally offer a competitive On Target Earnings (OTE) incentive compensation structure. Please note that the salary range is a guideline and compensation may vary based on factors such as qualifications, skill level, competencies and work location. Our benefits programs include: paid vacation and paid holidays, 401(k) plan with employer match, employee stock purchase plan, a variety of medical, dental and vision plan options, and more. We’re doing work that matters. Help us solve what others can’t.

Requirements

Must-haves

Work with customers on performance tuning.
Work with R&D in refining advanced compiler features.
Train customers in deploying advanced compiler features.
Handling issues reported by field AEs and customers.
Handle critical accounts escalation (Customer in Distress - CID) process and work closely with R&D managers in resolving critical customer issues.
Debug customer reported failures, produce test cases to replicate failure and log issues with HSV R&D teams.
Recommend potential workaround or application level solutions to customers when necessary.
Test R&D fixes/patches.
Develop expertise in h/w and f/w and support HSV field service team for h/w and f/w related issues.
Work with customer and internal groups to spec out enhancement requests.
Testing new product features for future s/w releases or h/w platform, including participation in internal beta activities.
Updating product training materials.
Requires a MS-EE/CE with 8 years of experience in design and/or verification of complex digital designs, or Applications engineering/technical support role.
Strong knowledge of design debug techniques and a strong understanding in logic design.
Strong knowledge of verification methodologies for complex EDA environments.
Expertise in HDL language like Verilog, System Verilog and VHDL. Ability to create test cases to replicate customer issues quickly.
Expertise in Unix/Linux scripting languages (ksh/bash/csh/perl).
Excellent communication skills. Must have ability to communicate complex issue to internal teams and customers in a clear and concise manner.
Occasional travel may be required to resolve critical customer issues.
Occasional travel, up to 10% (measured over the course of a rolling 12 month period), may be required to resolve critical customer issues.
We’re doing work that matters. Help us solve what others can’t.

Nice-to-haves

Expertise TBA, SV assertions/coverage, Low Power(CPF/UPF). UVM experience is a plus.
Experience with emulation, Cadence s Palladium/Protium product preferred.

Application prep

Use the role’s language and application details while tailoring your materials.

Platform: workday
Effort: long

Benefits

Benefits detected in the listing.

Dental

Vision

401(K)