Job description

IMC is seeking a Hardware Engineer to join our Global Hardware team and help develop the next generation of custom ASICs that power our trading infrastructure. As a member of the Global Hardware organization, you’ll work on long-term, high-impact engineering challenges that directly influence the performance and scalability of IMC’s trading systems. This team focuses on designing proprietary hardware solutions that deliver meaningful advantages in latency-sensitive environments, partnering closely with software engineers, researchers, and trading teams to solve complex technical problems. This role combines hardware design, verification, and system-level thinking. You’ll contribute across the ASIC development lifecycle, from RTL design and validation to integration within larger hardware platforms. Because of the team’s size and collaborative culture, engineers have broad ownership and exposure to multiple aspects of the design process rather than being confined to a narrow specialization. Your Core Responsibilities: Participate in the full ASIC development lifecycle, from specification through integration and deployment Design and implement RTL for next-generation ASIC platforms using SystemVerilog Contribute to architecture and design discussions for performance-critical hardware systems Develop new functionality that supports evolving trading and infrastructure requirements Collaborate with hardware, software, and research teams to translate requirements into scalable solutions Develop unit tests and verification environments for RTL designs Validate functionality and performance of hardware components Debug design and integration issues throughout the development process Contribute to verification methodologies and testing infrastructure Ensure designs meet reliability, performance, and maintainability requirements Develop scripts and tooling to improve engineering workflows Support automation efforts across design and verification processes Contribute to continuous improvements in development methodologies and engineering practices Your Skills & Experience: BS+ in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline Strong experience with RTL design and development using SystemVerilog Strong understanding of digital design fundamentals Working knowledge of C++ Experience developing and executing verification and test strategies Experience working with multi-clock-domain designs and clock-domain crossing concepts Solid understanding of Ethernet protocols and networking fundamentals Experience with Python, Bash, or similar scripting languages Strong debugging and problem-solving skills Ability to collaborate effectively across multiple engineering disciplines The Base Salary range for the role is included below. Base salary is only one component of total compensation; all full-time, permanent positions are eligible for a discretionary bonus and benefits, including paid leave and insurance. Please visit Benefits - US | IMC Trading for more comprehensive information. Salary Range $200,000 — $225,000 USD About Us IMC is a research-driven trading firm where quantitative modeling, machine learning, and engineering shape how modern markets are traded. A stabilizing force in markets since 1989, we provide liquidity across trading venues, delivering the best outcome in value and risk management to investors. Using our own technology and capital, we build proprietary systems and algorithms that operate across global markets. Our researchers, traders, and engineers work as a collective, combining rapid experimentation, advanced infrastructure, and real-time feedback to turn insight into execution and execution into advantage.

Requirements

Must-haves

IMC is seeking a Hardware Engineer to join our Global Hardware team and help develop the next generation of custom ASICs that power our trading infrastructure.
Participate in the full ASIC development lifecycle, from specification through integration and deployment
Design and implement RTL for next-generation ASIC platforms using SystemVerilog
Contribute to architecture and design discussions for performance-critical hardware systems
Develop new functionality that supports evolving trading and infrastructure requirements
Collaborate with hardware, software, and research teams to translate requirements into scalable solutions
Develop unit tests and verification environments for RTL designs
Validate functionality and performance of hardware components
Debug design and integration issues throughout the development process
Contribute to verification methodologies and testing infrastructure
Ensure designs meet reliability, performance, and maintainability requirements
Develop scripts and tooling to improve engineering workflows
Support automation efforts across design and verification processes
Contribute to continuous improvements in development methodologies and engineering practices
BS+ in Electrical Engineering, Computer Engineering, Computer Science, or a related technical discipline
Strong experience with RTL design and development using SystemVerilog
Strong understanding of digital design fundamentals
Working knowledge of C++
Experience developing and executing verification and test strategies
Experience working with multi-clock-domain designs and clock-domain crossing concepts
Solid understanding of Ethernet protocols and networking fundamentals
Experience with Python, Bash, or similar scripting languages
Strong debugging and problem-solving skills
Ability to collaborate effectively across multiple engineering disciplines

Nice-to-haves

None flagged.

Application prep

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Keywords to mirror

pythonmachine learning

Platform: greenhouse
Effort: quick