Job description

NVIDIA is leading the way in groundbreaking developments in Artificial Intelligence, High-Performance Computing and Visualization. The GPU, our invention, serves as the visual cortex of modern computers and is at the heart of our products and services. Our work opens up new universes to explore, enables amazing creativity and discovery, and powers what were once science fiction inventions from artificial intelligence to autonomous cars. NVIDIA is looking for phenomenal people like you to help us accelerate the next wave of artificial intelligence. We serve as the central program management function for NVIDIA’s VLSI Engineering organization, providing the structure and insight needed to deliver world-class silicon. We align roadmaps across all silicon product lines, enabling technical leads to focus on engineering while we accelerate end-to-end execution. Through the integration of domain-specific workflows and intelligent infrastructure, we deliver automated schedule tracking, resource planning, and program health visibility across the full lifecycle—from Arch/RTL handoff through silicon bring-up and productization. We are seeking a Senior Technical Program Manager to lead the end-to-end lifecycle for the Circuit Solutions Group (CSG), spanning pre- and post-silicon execution. What You'll be Doing: As a Senior TPM, you will bridge the gap between architectural concepts and physical silicon. Your mission is to accelerate tape-out cycles by optimizing engineering workflow schedules and to track Closed-Loop Validation • Drive the "Arch-to-Silicon" lifecycle, developing high-fidelity schedules and handling complex dependencies across design, verification, physical implementation and tape-out validation • Act as the primary strategic liaison between CSG and cross-functional partners, including VLSI, Architecture, ASIC, Operations and Systems • Participate in key design reviews and handle the change control process to ensure scope changes are balanced against schedule impacts. • Lead Closed-Loop Validation schedules by systematically comparing silicon results against simulation assumptions to refine future model accuracy. • Orchestrate post-silicon test plans, ensuring comprehensive coverage of architectural requirements, PVT corners, and critical corner cases • Build expert-level Smartsheet dashboards to provide real-time insight into program health, test plan progress, and prioritization for executive team. • Drive operational excellence by codifying procedures and employing Python to automate the ingestion of lab data into project management tools. What We Need to See: • BS in Electrical Engineering, Computer Engineering, or a related field or equivalent experience (Masters preferred) • 8+ years of TPM experience with a focus on Semiconductor Design and the full ASIC/SoC lifecycle. • Strong technical fluency in VLSI, specifically regarding design cycle, silicon validation and correlation • Ability to align different teams on a unified execution path and influence technical trade-offs. • Demonstrate critical thinking with the ability to synthesize complex technical data into actionable project plans. • Outstanding negotiation and presentation skills; ability to influence senior engineering staff without direct authority. • Expert-level Smartsheet proficiency is required, including advanced automation and visual dashboarding. Ways to stand out from the crowd: • Direct background in circuit design or hardware validation. • Proficiency in Python to automate data-driven project management tasks. • Experience running projects in cutting-edge process nodes. NVIDIA offers highly competitive salaries and a comprehensive benefits package. We have some of the most brilliant and talented people in the world working for us and, due to unprecedented growth, our world-class engineering teams are growing fast. If you're a creative and autonomous engineer with real passion for technology, we want to hear from you. #LI-Hybrid Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 258,750 USD for Level 4, and 200,000 USD - 322,000 USD for Level 5. You will also be eligible for equity and benefits . Applications for this job will be accepted at least until September 8, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Requirements

Must-haves

We are seeking a Senior Technical Program Manager to lead the end-to-end lifecycle for the Circuit Solutions Group (CSG), spanning pre- and post-silicon execution.
As a Senior TPM, you will bridge the gap between architectural concepts and physical silicon. Your mission is to accelerate tape-out cycles by optimizing engineering workflow schedules and to track Closed-Loop Validation
Drive the "Arch-to-Silicon" lifecycle, developing high-fidelity schedules and handling complex dependencies across design, verification, physical implementation and tape-out validation
Act as the primary strategic liaison between CSG and cross-functional partners, including VLSI, Architecture, ASIC, Operations and Systems
Participate in key design reviews and handle the change control process to ensure scope changes are balanced against schedule impacts.
Lead Closed-Loop Validation schedules by systematically comparing silicon results against simulation assumptions to refine future model accuracy.
Orchestrate post-silicon test plans, ensuring comprehensive coverage of architectural requirements, PVT corners, and critical corner cases
Build expert-level Smartsheet dashboards to provide real-time insight into program health, test plan progress, and prioritization for executive team.
Drive operational excellence by codifying procedures and employing Python to automate the ingestion of lab data into project management tools.
8+ years of TPM experience with a focus on Semiconductor Design and the full ASIC/SoC lifecycle.
Strong technical fluency in VLSI, specifically regarding design cycle, silicon validation and correlation
Ability to align different teams on a unified execution path and influence technical trade-offs.
Demonstrate critical thinking with the ability to synthesize complex technical data into actionable project plans.
Outstanding negotiation and presentation skills; ability to influence senior engineering staff without direct authority.
Expert-level Smartsheet proficiency is required, including advanced automation and visual dashboarding.
Direct background in circuit design or hardware validation.
Proficiency in Python to automate data-driven project management tasks.
Experience running projects in cutting-edge process nodes.
You will also be eligible for equity and benefits .
Applications for this job will be accepted at least until September 8, 2026.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.

Nice-to-haves

BS in Electrical Engineering, Computer Engineering, or a related field or equivalent experience (Masters preferred)

Application prep

Use the role’s language and application details while tailoring your materials.

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pythonai

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