Job description

Job Description: Being responsible for SRAM memory device development, you will join a small development team with talented and driven contributors to deliver high-density, production-worthy, reliable memory technology on schedule and within budget. You will work with development wafer fabrication facilities to manage device definition, creation, demonstration, and delivery and work with multiple design groups to capture requirements and to evaluate tradeoffs providing a unique opportunity to create SRAM memory solutions for TI customers. Highly visible position interacting with multiple business groups, development groups, and fabrication facilities. You will be involved in innovative pathfinding projects. Opening is within Advanced Technology Development Department of the Technology and Manufacturing Group. Responsibilities include SRAM bitcell design, process integration, SWR/DOE (experiments) definition and generation, test structure definition, characterization, data analysis, design rule generation, process control document generation, device characterization, device simulation, driving SRAM yield and qualification. Minimum Requirements: • Master of Science degree in Electrical Engineering or related degree • 10 + years of relevant experience with solid understanding of CMOS and memory process flows and device integration, SRAM operation, and reliability • Demonstratable experience and ability to simulate SRAM bitcells (process, electrical, and circuit levels) for transistor design, bitcell functionality and margin Preferred Qualifications: • Knowledge of memory device physics, including non-volatile memory devices • Circuit design engineering background • Knowledge of Spectre simulation and Cadence design/layout tools • Knowledge and user of data analysis tools including JMP, Spotfire, Dataware, etc. as well as parsing code languages such as PERL, and Python • Ability to organize tasks and manage schedules while working simultaneously with multiple organizations and multiple management chains. Hands-on person willing to take ownership • Working knowledge of yield and data analysis • Good communication and documentation skills • Ability to drive for success and thrive in a fast-paced development environment with multiple shifting priorities

Requirements

Must-haves

Master of Science degree in Electrical Engineering or related degree
10 + years of relevant experience with solid understanding of CMOS and memory process flows and device integration, SRAM operation, and reliability
Demonstratable experience and ability to simulate SRAM bitcells (process, electrical, and circuit levels) for transistor design, bitcell functionality and margin

Nice-to-haves

Knowledge of memory device physics, including non-volatile memory devices
Circuit design engineering background
Knowledge of Spectre simulation and Cadence design/layout tools
Knowledge and user of data analysis tools including JMP, Spotfire, Dataware, etc. as well as parsing code languages such as PERL, and Python
Ability to organize tasks and manage schedules while working simultaneously with multiple organizations and multiple management chains. Hands-on person willing to take ownership
Working knowledge of yield and data analysis
Good communication and documentation skills
Ability to drive for success and thrive in a fast-paced development environment with multiple shifting priorities

Application prep

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Keywords to mirror

python

Platform: oracle-cloud
Effort: medium