Develop and simulate self-checking, functional design verification, and validation test benches
Development of FPGA systems using logic design and RTL coding.
Lab Debug of FPGA prototypes using logic analyzers, oscilloscopes and signal generators.
Modify C code controlling automated test equipment
Minimum Qualifications (Experience and Skills)
Ability to develop RTL and run Verilog simulations
Familiarity with FPGA development tools and lab debug of FPGA design projects
Familiarity with sequential and combinational logic, finite state machines, data path components such as adders, comparators, subtractors, multipliers, shifters, counters, timers
Familiarity with timing, metastability, setup/hold constraints
Familiarity with memory components, storage elements
Familiarity with software techniques, particularly programming in Python
Nice-to-haves
Good Communication skills
Experience with serial interface protocols such as SPI or I2C
Experience with Cadence CAD tools, Simvision/Xcelium simulator, Genus synthesis, Innovus Auto Place, and Route
Understanding of test vectors and digital test concepts
Experience in ASIC front-end implementation tool flows and silicon bring-up
Education Requirements
Work Environment
This job operates in a professional office environment. This role routinely uses standard office equipment.
Physical Demands
Thank you for your interest in our temporary position. Please be advised that the selected candidate will be employed and receive all wages directly from a third party staffing agency selected by pSemi.
USD 32.20 - 58.32 per hour
Application prep
Use the role’s language and application details while tailoring your materials.