Job description

Please Note: 1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account) 2. If you already have a Candidate Account, please Sign-In before you apply. Job Description: Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for industry-leading ASICs with high-speed SerDes and very-high-power delivery needs. You will be part of a worldwide R&D team developing high-performance package designs for ASICs for artificial intelligence (AI), networking, high-performance computing (HPC), and 5G base stations. These designs include SerDes at 448G and higher, 5G RF/Microwave ADC/DAC, HBM, DDR5 and more. You ll have the opportunity to collaborate with the team to create the package structures needed to enable new design, and contribute to efficiency improvements for our design team. RESPONSIBILITIES: Overall design responsibility for ASIC package designs, including aspects of signal integrity, power integrity, manufacturability, reliability, and thermal, in partnership with our experienced team of package engineering experts. Package Design of critical structures for SerDes, ADC/DAC, DDR, HBM, etc. Schedule, prioritize, and track your work across 2 projects simultaneously General flip-chip BGA package design and engineering Project management and customer interface for your design projects Contribute to efficiency improvements for the design team, through process development/improvement, automation, documentation, etc. Physical design (layout) is a foundational responsibility in this role EDUCATION/EXPERIENCE & REQUIREMENTS: BSEE or similar field and 12 years’ experience in flip-chip-BGA package design, including high-speed SerDes or MSEE or similar field and 10 years’ work experience Knowledge of package-level signal integrity and power integrity, to apply to package designs Cadence APD (allegro package designer) experience is preferred. Equivalent tool is OK. Cooperate with our world-wide team (multiple time zones), including co-design with internal team members and external (Vendor) designers Self-management and organization skills Preferred candidates will also have 1 or more years experience with Cadence SKILL for Allegro, or similar design-automation coding experience and interest OTHER REQUIREMENTS This job requires working on-site at the Broadcom office, 5 days a week. This is not a remote-work position. Compensation and Benefits The annual base salary range for this position is USD 143,800.00 To USD 230,000.00 As a valued member of our team, you ll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company s growth. All subject to relevant plan documents and award agreements. Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence. Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law. If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

Requirements

Must-haves

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Package Design of critical structures for SerDes, ADC/DAC, DDR, HBM, etc.
Schedule, prioritize, and track your work across 2 projects simultaneously
General flip-chip BGA package design and engineering
Project management and customer interface for your design projects
Contribute to efficiency improvements for the design team, through process development/improvement, automation, documentation, etc.
Physical design (layout) is a foundational responsibility in this role
BSEE or similar field and 12 years’ experience in flip-chip-BGA package design, including high-speed SerDes or MSEE or similar field and 10 years’ work experience
Knowledge of package-level signal integrity and power integrity, to apply to package designs
Cooperate with our world-wide team (multiple time zones), including co-design with internal team members and external (Vendor) designers
Self-management and organization skills
This job requires working on-site at the Broadcom office, 5 days a week. This is not a remote-work position.

Nice-to-haves

Cadence APD (allegro package designer) experience is preferred. Equivalent tool is OK.
Preferred candidates will also have 1 or more years experience with Cadence SKILL for Allegro, or similar design-automation coding experience and interest

Application prep

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Keywords to mirror

Platform: workday
Effort: long

Benefits

Benefits detected in the listing.

Dental

Vision

401(K)