Job description

Join d-Matrix and help build the future of AI inference. We’ve pioneered a memory-centric architecture that brings compute directly into memory, making AI faster, more energy efficient, and accessible on a global scale. From chips and software to rack-scale systems, our team is tackling some of AI infrastructure’s hardest challenges—and shipping breakthrough technology today. If you want to create what comes next and help make infinite inference possible, we’d love to hear from you. Our culture is built on respect, collaboration, and direct communication. We value humility, we believe our different perspectives lead to better solutions, and we’re looking for people who are driven by execution and energized by hard problems. Location: Hybrid, working onsite at our Santa Clara, Ca headquarters 3-5 days per week. The Role: Principal Technical Program Manager, HW/Systems We are seeking a Principal Technical Program Manager to drive engineering excellence across the global hardware organization. This role will focus on creating lightweight, scalable processes that enable predictable project delivery in a high-growth startup environment. You will partner with engineering leaders to translate company objectives into actionable software programs, improve planning and execution practices, and foster collaboration across geographies and technical domains. The ideal candidate should be comfortable working in a fast-paced, globally distributed environment and is passionate about delivering high-quality product on time. What you will do: - Lead end-to-end program management across post-silicon & system hardware development cycle: - Preparation for silicon arrival: creating lab space, bring-up systems/boards, production (EVK) design, validation across, Silicon & Systems Hardware, Firmware, QA and Manufacturing engineering teams. - Firmware deployment and development leading up to demonstration of all key features of the chip and systems - Power and performance characterization, demo version delivery, leading up to kick-off of quals: silicon qual, board qual, product qual, and NPI. - Establish well-defined predictable milestones for development within the company and 3rd party partners. - Coordinate delivery across teams in North America, India, Serbia, and Australia. - Define metrics, create dashboards and reporting to track progress and program health. - Develop playbooks and best practices for program management across the organization for cross-functional deliveries. - Identify and mitigate risks to delivery schedules and quality. - Act as a liaison between hardware teams and company leadership, providing clear updates and insights. - Collaborate with Product, Hardware, and other partner teams to manage dependencies. What you will bring: Minimum: - 10+ years of experience in IC chip and board development as an engineer, engineering manager, or technical program manager, with the last 3 or more years as technical program manager. - Excellent communication and stakeholder management skills; ability to influence without authority. - Experience in companies with complex software/hardware integration. - Proven track record managing distributed, multi-region engineering teams. - Strong understanding of the system development and qualification cycle and waterfall program management methodologies. - Experience establishing scalable processes in fast-moving engineering organizations. Preferred: - Prior industry experience as Engineering Manager responsible for chip-to-ship execution – post-silicon to product. - Background in datacenter hardware development companies. - Experience scaling engineering teams at Series B/C stage startups. - Proficiency with JIRA, Smartsheet, and project toolchain integration. - Experience managing external dependencies and customer-driven timelines. What we offer: - Opportunity to shape program management practices across a fast-growing AI company. - High-impact role influencing effectiveness of a global software team. - Collaboration with world-class engineers at the cutting edge of AI and system software. - Competitive compensation, equity, and professional growth opportunities. Success Metrics: - Predictable release cycles with measurable delivery improvements. - More accurate planning and forecasting across projects. - Stronger cross-team coordination, measured by stakeholder feedback. - Scalable practices supporting growth to 300+ engineers. Equal Opportunity Employment Policy d-Matrix is proud to be an equal opportunity workplace and affirmative action employer. We’re committed to fostering an inclusive environment where everyone feels welcomed and empowered to do their best work. We hire the best talent for our teams, regardless of race, religion, color, age, disability, sex, gender identity, sexual orientation, ancestry, genetic information, marital status, national origin, political affiliation, or veteran status. Our focus is on hiring teammates with humble expertise, kindness, dedication and a willingness to embrace challenges and learn together every day. d-Matrix does not accept resumes or candidate submissions from external agencies. We appreciate the interest and effort of recruitment firms, but we kindly request that individual interested in opportunities with d-Matrix apply directly through our official channels. This approach allows us to streamline our hiring processes and maintain a consistent and fair evaluation of al applicants. Thank you for your understanding and cooperation.

Requirements

Must-haves

If you want to create what comes next and help make infinite inference possible, we’d love to hear from you.
Hybrid, working onsite at our Santa Clara, Ca headquarters 3-5 days per week.
The Role: Principal Technical Program Manager, HW/Systems
Lead end-to-end program management across post-silicon & system hardware development cycle:
Preparation for silicon arrival: creating lab space, bring-up systems/boards, production (EVK) design, validation across, Silicon & Systems Hardware, Firmware, QA and Manufacturing engineering teams.
Firmware deployment and development leading up to demonstration of all key features of the chip and systems
Power and performance characterization, demo version delivery, leading up to kick-off of quals: silicon qual, board qual, product qual, and NPI.
Establish well-defined predictable milestones for development within the company and 3rd party partners.
Coordinate delivery across teams in North America, India, Serbia, and Australia.
Define metrics, create dashboards and reporting to track progress and program health.
Develop playbooks and best practices for program management across the organization for cross-functional deliveries.
Identify and mitigate risks to delivery schedules and quality.
Act as a liaison between hardware teams and company leadership, providing clear updates and insights.
Collaborate with Product, Hardware, and other partner teams to manage dependencies.
10+ years of experience in IC chip and board development as an engineer, engineering manager, or technical program manager, with the last 3 or more years as technical program manager.
Excellent communication and stakeholder management skills; ability to influence without authority.
Experience in companies with complex software/hardware integration.
Proven track record managing distributed, multi-region engineering teams.
Strong understanding of the system development and qualification cycle and waterfall program management methodologies.

Nice-to-haves

Prior industry experience as Engineering Manager responsible for chip-to-ship execution – post-silicon to product.
Background in datacenter hardware development companies.
Experience scaling engineering teams at Series B/C stage startups.
Proficiency with JIRA, Smartsheet, and project toolchain integration.
Experience managing external dependencies and customer-driven timelines.

Application prep

Use the role’s language and application details while tailoring your materials.

Keywords to mirror

aijira

Platform: ashby
Effort: quick