Job description

RELOCATION ASSISTANCE: No relocation assistance available CLEARANCE REQUIRED FOR START: No CLEARANCE TYPE: None TRAVEL: Yes, 10% of the Time Description At Northrop Grumman, our employees have incredible opportunities to work on revolutionary systems that impact people's lives around the world today, and for generations to come. Our pioneering and inventive spirit has enabled us to be at the forefront of many technological advancements in our nation's history - from the first flight across the Atlantic Ocean, to stealth bombers, to landing on the moon. We look for people who have bold new ideas, courage and a pioneering spirit to join forces to invent the future, and have fun along the way. Our culture thrives on intellectual curiosity, cognitive diversity and bringing your whole self to work — and we have an insatiable drive to do what others think is impossible. Our employees are not only part of history, they're making history. Northrop Grumman's Space Systems Sector has openings for a FPGA/ASIC Engineer - Level 3 to join our team in Gilbert, AZ. As a FPGA/ASIC Engineer, you will be responsible for research, requirements analysis and systems architecture, design, coding, test bench design, verification, synthesis and place & route for our Command and Data Handling (C&DH) products. You will specialize in FPGA/ASIC for space applications. Job responsibilities include, but are not limited to, the following: • HDL design for FPGA and/or ASIC applications • FPGA/ASIC verification via simulation and emulation (lab testing) • FPGA/ASIC synthesis, timing analysis, and place & route • FPGA design for space environments or space applications Basic Qualifications : • Bachelor’s degree in a Science, Technology, Engineering, or Mathematics (STEM) discipline from an accredited university and 5 years of experience, or 3 years of experience with a Master’s degree or 1 years of relevant experience with a PhD • Experience in RTL design for an aerospace environment or space application • Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place & route, static timing analysis, and power analysis • Industry experience in FPGA Design, Simulation and V&V Preferred Qualifications : • Advance degree in Electrical or Computer Engineering • Top Secret clearance • Experience with Electronic Design Automation (EDA) Tools (e.g., Xilinx ISE/Vivado, Mentor Graphics ModelSim/QuestaSim, Synplify) • Implementation of Digital Signal or Image Processing algorithms on FPGAs • Expertise achieving timing closure on FPGA designs and generating test benches for full functional simulation • Experience working with or developing test benches using System Verilog and Universal Verification Methodology (UVM) • Experience debugging down to the hardware level with experience using Signal Generators, Logic Analyzers, Digital Oscilloscopes and Embedded FPGA Debugging tools #AZSpace #SpaceEngJobs Primary Level Salary Range: $98,400.00 - $147,600.00 The above salary range represents a general guideline; however, Northrop Grumman considers a number of factors when determining base salary offers such as the scope and responsibilities of the position and the candidate's experience, education, skills and current market conditions. Depending on the position, employees may be eligible for overtime, shift differential, and a discretionary bonus in addition to base pay. Annual bonuses are designed to reward individual contributions as well as allow employees to share in company results. Employees in Vice President or Director positions may be eligible for Long Term Incentives. In addition, Northrop Grumman provides a variety of benefits including health insurance coverage, life and disability insurance, savings plan, Company paid holidays and paid time off (PTO) for vacation and/or personal business. The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates. Northrop Grumman is an Equal Opportunity Employer, making decisions without regard to race, color, religion, creed, sex, sexual orientation, gender identity, marital status, national origin, age, veteran status, disability, or any other protected class. For our complete EEO and pay transparency statement, please visit northropgrumman.com. U.S. Citizenship is required for all positions with a government clearance and certain other restricted positions.

Requirements

Must-haves

RELOCATION ASSISTANCE: No relocation assistance available
CLEARANCE REQUIRED FOR START: No
CLEARANCE TYPE: None
TRAVEL: Yes, 10% of the Time Description
Northrop Grumman's Space Systems Sector has openings for a FPGA/ASIC Engineer - Level 3 to join our team in Gilbert, AZ.
Job responsibilities include, but are not limited to, the following:
HDL design for FPGA and/or ASIC applications
FPGA/ASIC verification via simulation and emulation (lab testing)
FPGA/ASIC synthesis, timing analysis, and place & route
FPGA design for space environments or space applications
Experience in RTL design for an aerospace environment or space application
Proficient in FPGA design flow including items such as RTL/gate level simulation, synthesis, place & route, static timing analysis, and power analysis
Industry experience in FPGA Design, Simulation and V&V

Nice-to-haves

Advance degree in Electrical or Computer Engineering
Top Secret clearance
Experience with Electronic Design Automation (EDA) Tools (e.g., Xilinx ISE/Vivado, Mentor Graphics ModelSim/QuestaSim, Synplify)
Implementation of Digital Signal or Image Processing algorithms on FPGAs
Expertise achieving timing closure on FPGA designs and generating test benches for full functional simulation
Experience working with or developing test benches using System Verilog and Universal Verification Methodology (UVM)
Experience debugging down to the hardware level with experience using Signal Generators, Logic Analyzers, Digital Oscilloscopes and Embedded FPGA Debugging tools
#SpaceEngJobs
The application period for the job is estimated to be 20 days from the job posting date. However, this timeline may be shortened or extended depending on business needs and the availability of qualified candidates.

Application prep

Use the role’s language and application details while tailoring your materials.

Platform: eightfold
Effort: medium

Benefits

Benefits detected in the listing.

Health Insurance

Pto

Paid Time Off