Job description

Overview Microsoft Silicon, Cloud Hardware, and Infrastructure Engineering (SCHIE) is the team behind Microsoft’s expanding Cloud Infrastructure and responsible for powering Microsoft’s “Intelligent Cloud” mission. SCHIE delivers the core infrastructure and foundational technologies for Microsoft's over 200 online businesses including Bing, MSN, Office 365, Xbox Live, Teams, OneDrive, and the Microsoft Azure platform globally with our server and data center infrastructure, security and compliance, operations, globalization, and manageability solutions. Our focus is on smart growth, high efficiency, and delivering a trusted experience to customers and partners worldwide and we are looking for passionate engineers to help achieve that mission. Are you seeking an opportunity to work on delivering silicon solutions that have a planet-scale impact? The Data Processing Unit (DPU) team within the Azure Hardware Systems & Infrastructure group is seeking a Senior Silicon Engineer. You will join our front-end silicon team and be responsible for delivering cutting-edge, high performance, low power, scalable and programmable DPU silicon. #azurehwjobs #SCHIE Responsibilities As a Senior Silicon Engineer in the data processing unit team you will be designing modules to solve complex problems in a datacenter for the DPU silicon. You will interact with the software team to co-develop programmable silicon implementation, microarchitecture and work with design verification and physical design teams on delivering a quality module. The vast breadth of domains required to build our DPU silicon gives the opportunity to experience different areas of expertise. Solve complex engineering problems utilizing your experience. Qualifications Required Qualifications • Doctorate in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 1+ year(s) technical engineering experience OR Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 4+ years technical engineering experience OR Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field AND 5+ years technical engineering experience • OR equivalent experience. Other Requirements • Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter. • This role will requires access to information that is controlled for export under export control regulations, potentially under the U.S. International Traffic in Arms Regulations or Export Administration Regulations, the EU Dual Use Regulation, and/or other export control regulations. As a condition of employment, the candidate will be required to provide either proof of their country of citizenship or proof of their US. residency or other protected status (e.g., under 8 U.S.C. 1324b(a)(3)) for assessment of eligibility to access the export-controlled information. To meet this legal requirement, and as a condition of employment, the candidate’s citizenship will be verified with a valid passport. Lawful permanent residents, refugees, and asylees may verify status using other documents, where applicable. Preferred Qualifications • BS and/or MS in Electrical Engineering or equivalent degree • 8+ years of RTL Design and micro-architecture experience • Design of modules in the networking silicon • Experience with the development of complex modules from concept to silicon. • Understanding of processors and peripheral interconnect bus protocols and architectures is a plus. • Understanding of low power microarchitecture techniques. • Knowledge of Verilog, System Verilog, C++, Python and Perl Silicon Engineering IC4 - The typical base pay range for this role across the U.S. is USD $119,800 - $234,700 per year. There is a different range applicable to specific work locations, within the San Francisco Bay area and New York City metropolitan area, and the base pay range for this role in those locations is USD $160,200 - $261,000 per year. Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here: careers.microsoft.com This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled. Microsoft is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to age, ancestry, citizenship, color, family or medical care leave, gender identity or expression, genetic information, immigration status, marital status, medical condition, national origin, physical or mental disability, political affiliation, protected veteran or military status, race, ethnicity, religion, sex (including pregnancy), sexual orientation, or any other characteristic protected by applicable local laws, regulations and ordinances. If you need assistance with religious accommodations and/or a reasonable accommodation due to a disability during the application process, read more about requesting accommodations.

Requirements

Must-haves

#azurehwjobs
OR equivalent experience.
Other Requirements
8+ years of RTL Design and micro-architecture experience
This position will be open for a minimum of 5 days, with applications accepted on an ongoing basis until the position is filled.

Nice-to-haves

BS and/or MS in Electrical Engineering or equivalent degree
Design of modules in the networking silicon
Experience with the development of complex modules from concept to silicon.
Understanding of processors and peripheral interconnect bus protocols and architectures is a plus.
Understanding of low power microarchitecture techniques.
Knowledge of Verilog, System Verilog, C++, Python and Perl
Certain roles may be eligible for benefits and other compensation. Find additional benefits and pay information here:

Application prep

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Keywords to mirror

azurepython

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