Job description

FPGA Design Engineer This role has been designed as ‘’Onsite’ with an expectation that you will primarily work from an HPE office. Who We Are: Hewlett Packard Enterprise is the global edge-to-cloud company advancing the way people live and work. We help companies connect, protect, analyze, and act on their data and applications wherever they live, from edge to cloud, so they can turn insights into outcomes at the speed required to thrive in today’s complex world. Our culture thrives on finding new and better ways to accelerate what’s next. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. If you are looking to stretch and grow your career our culture will embrace you. Open up opportunities with HPE. Job Description: Responsibilities Develop RTL for Xilinx (AMD) FPGA and/or Lattice CPLD designs Selection of appropriate parts for designs weighing against numerous criteria such as cost, complexity, longevity, expandability, etc. Design of hardware controls & knowledge in sequencing power, control and monitoring LSI and ASIC devices within compute, switch or storage board designs Perform simulation, design, synthesis and timing validation in Verilog RTL Creating IP for interface controllers, functionality as needed Conduct reviews of your designs with the design and operations teams, and contribute to team schematic design reviews per HPE’s product design, development, and release processes Generate programming models and work with firmware engineers on driver development Work closely with board engineers for bring-up and testing of printed circuit assemblies Lead or support debug of development and field issues. Track and document issue discovery, investigation plans/results, issue resolution, and issue closure in issue tracking data bases Work with HPE partners and vendors to define requirements, support co-development or debug efforts Work with FPGA vendors to understand roadmaps as well as new IP developments Education and Experience Bachelor s or Master s degree in Electrical Engineering. 4 or more years experience writing RTL for FPGAs for complex compute boards and/or ASIC designs Experience with BMC controllers, management interfaces for various CPU or GPU types, hardware management using I2C, SMBUS, JTAG, SPI, LPC, Wishbone, eSPI, PCIe, Ethernet, etc. protocols is desired Knowledge of server grade x86 and/or ARM and/or GPU processors is desired Experience with Xilinx Spartan 6, Spartan 7, Artix 7 families desired Knowledge and Skills Ability to read and understand complex digital board schematics is required Ability to work independently and within design teams on multiple projects Ability to use lab equipment, scopes and analyzers, to debug complex problems Ability to work successfully with engineers across all geos to meet design requirements and schedules Excellent written and verbal communication skills Some travel may be required Accessibility HPE is committed to creating an inclusive and accessible workplace and encourages applications from all qualified individuals, including those with disabilities. If you believe you require accommodation during any stage of the application or interview process, please submit your request by completing our secure form linked here . Note: This option is reserved for applicants needing assistance/reasonable accommodation related to a disability. What We Can Offer You: Health & Wellbeing We strive to provide our team members and their loved ones with a comprehensive suite of benefits that supports their physical, financial and emotional wellbeing. Personal & Professional Development We also invest in your career because the better you are, the better we all are. We have specific programs catered to helping you reach any career goals you have — whether you want to become a knowledge expert in your field or apply your skills to another division. Unconditional Inclusion We are unconditionally inclusive in the way we work and celebrate individual uniqueness. We know varied backgrounds are valued and succeed here. We have the flexibility to manage our work and personal needs. We make bold moves, together, and are a force for good. Let s Stay Connected: Follow HPECareers on Instagram to see the latest on people, culture and tech at HPE. Job: Engineering Job Level: TCP_02 "The expected salary/wage range for this position is provided below. Actual offer may vary from this range based upon geographic location, work experience, education/training, and/or skill level. – United States of America: Annual Salary USD 74,000 - 170,300 in Texas & Wisconsin The listed salary range reflects base salary. Variable incentives may also be offered." Information about employee benefits offered in the US can be found at myhperewards.com HPE is an Equal Employment Opportunity/ Veterans/Disabled/LGBT employer. We do not discriminate on the basis of race, gender, or any other protected category, and all decisions we make are made on the basis of qualifications, merit, and business need. Our goal is to be one global team that is representative of our customers, in an inclusive environment where we can continue to innovate and grow together. Please click here: Equal Employment Opportunity . Hewlett Packard Enterprise is EEO Protected Veteran/ Individual with Disabilities. HPE will comply with all applicable laws related to employer use of arrest and conviction records, including laws requiring employers to consider for employment qualified applicants with criminal histories. Recruitment Fraud Alert We have become aware of an increase in fraudulent recruitment activities in which individuals impersonate our company or authorized recruitment agencies to offer fake employment opportunities. These scams may occur through false websites, emails, social media, or chat-based applications and often aim to obtain personal information or money. Please note that Hewlett Packard Enterprise (HPE), its direct and indirect subsidiaries and affiliated companies, and its authorized recruitment agencies/vendors will never charge a candidate a registration fee, hiring fee, or any other fee in connection with its recruitment and hiring process. We also never request personal information such as back account details, Social Security numbers, or national IDs via social media or chat applications. All legitimate job opportunities will come through official company channels, and candidates are responsible for verifying the credentials of any third party claiming to represent the company. Any reliance on fraudulent communication is at the individual’s own risk, and HPE disclaims legal liability for any resulting damages. If you suspect recruitment fraud, do not share personal information or make any payments and report the incident to your local authorities immediately.

Requirements

Must-haves

FPGA Design Engineer
Develop RTL for Xilinx (AMD) FPGA and/or Lattice CPLD designs
Selection of appropriate parts for designs weighing against numerous criteria such as cost, complexity, longevity, expandability, etc.
Design of hardware controls & knowledge in sequencing power, control and monitoring LSI and ASIC devices within compute, switch or storage board designs
Perform simulation, design, synthesis and timing validation in Verilog RTL
Creating IP for interface controllers, functionality as needed
Conduct reviews of your designs with the design and operations teams, and contribute to team schematic design reviews per HPE’s product design, development, and release processes
Generate programming models and work with firmware engineers on driver development
Work closely with board engineers for bring-up and testing of printed circuit assemblies
Lead or support debug of development and field issues. Track and document issue discovery, investigation plans/results, issue resolution, and issue closure in issue tracking data bases
Work with HPE partners and vendors to define requirements, support co-development or debug efforts
Work with FPGA vendors to understand roadmaps as well as new IP developments
Education and Experience
Bachelor s or Master s degree in Electrical Engineering.
4 or more years experience writing RTL for FPGAs for complex compute boards and/or ASIC designs
Experience with BMC controllers, management interfaces for various CPU or GPU types, hardware management using I2C, SMBUS, JTAG, SPI, LPC, Wishbone, eSPI, PCIe, Ethernet, etc. protocols is desired
Knowledge of server grade x86 and/or ARM and/or GPU processors is desired
Experience with Xilinx Spartan 6, Spartan 7, Artix 7 families desired
Knowledge and Skills
Ability to read and understand complex digital board schematics is required
Ability to work independently and within design teams on multiple projects
Ability to use lab equipment, scopes and analyzers, to debug complex problems
Ability to work successfully with engineers across all geos to meet design requirements and schedules
Excellent written and verbal communication skills

Nice-to-haves

None flagged.

Application prep

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Keywords to mirror

accessibility

Platform: workday
Effort: long

Benefits

Benefits detected in the listing.

Vision

Professional Development