Job description

NVIDIA is now looking for a Senior Memory System Engineer to join our ASIC Memory Subsystem team! As a Senior Systems Engineer at NVIDIA, you'll join a group of hardworking engineers to develop and architect innovative Memory Solution for Tegra SoCs. In this position, you'll make a real impact in a multifaceted, technology-focused company. You will work with memory controller/PHY and Platform / System architect, Firmware, SI/PI, Memory suppliers to design and architect cutting edge, high speed and lower power memory technology for NVIDIA CPUs and SOCs. What You Will Be Doing: • Analyze future DDR/LPDDR/HBM technologies to determine optimum performance, power, function and RAS in memory for Next generation SOC and Systems. • Collaborate with ASIC Architects, Designers, Software and Firmware SW/FW teams to drive memory technology and associated requirements for memory controllers. • Define Memory module, Package, and PCB layouts appropriate to the system workloads • Debug and bring up memory evaluation / validation and failure issues on memory technology. • Collaborate with DRAM suppliers and industry partners on to develop memory and memory related component technology. What We need to see: • Bachelor's degree or master’s degree in Electrical Engineering, Computer Engineering (CE), or a related field (or equivalent experience) • 10 years of proven track record in DRAM design, module design, or memory sub system design. • Deep understanding and strong fundamental of memory design, features, ECC algorithm, SI and PI (Training algorithm) in DDR, LPDDR, and HBM. • Strong understanding of memory sub system level interaction with Cache, Memory controller and PHY. • Experience in the design, bring-up and validation for memory failure analysis • Experience with Python, C/C++ for development and memory workload analysis. • Strong user documentation and interpersonal skills With competitive salaries and a generous benefits package, we are widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us and, due to unprecedented growth, our best-in-class engineering teams are rapidly growing. If you're creative and autonomous, we want to hear from you! #LI-Hybrid Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 184,000 USD - 287,500 USD for Level 4, and 224,000 USD - 356,500 USD for Level 5. You will also be eligible for equity and benefits . Applications for this job will be accepted at least until September 25, 2026. This posting is for an existing vacancy. NVIDIA uses AI tools in its recruiting processes. NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

Requirements

Must-haves

Analyze future DDR/LPDDR/HBM technologies to determine optimum performance, power, function and RAS in memory for Next generation SOC and Systems.
Collaborate with ASIC Architects, Designers, Software and Firmware SW/FW teams to drive memory technology and associated requirements for memory controllers.
Define Memory module, Package, and PCB layouts appropriate to the system workloads
Debug and bring up memory evaluation / validation and failure issues on memory technology.
Collaborate with DRAM suppliers and industry partners on to develop memory and memory related component technology.
Bachelor's degree or master’s degree in Electrical Engineering, Computer Engineering (CE), or a related field (or equivalent experience)
10 years of proven track record in DRAM design, module design, or memory sub system design.
Deep understanding and strong fundamental of memory design, features, ECC algorithm, SI and PI (Training algorithm) in DDR, LPDDR, and HBM.
Strong understanding of memory sub system level interaction with Cache, Memory controller and PHY.
Experience in the design, bring-up and validation for memory failure analysis
Experience with Python, C/C++ for development and memory workload analysis.
Strong user documentation and interpersonal skills
You will also be eligible for equity and benefits .
Applications for this job will be accepted at least until September 25, 2026.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.

Nice-to-haves

None flagged.

Application prep

Use the role’s language and application details while tailoring your materials.

Keywords to mirror

pythonai

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