FPGA Engineer (Senior-Level)

• Due to facility security requirements, only U.S. citizens are eligible for consideration at this time.
• Ability to complete a pre-employment background check and drug screening, which will include but is not limited to testing for marijuana use.
• 10 or more years of hands-on FPGA development experience.
• Experience successfully integrating FPGA designs into system-wide hardware/software environments.
• Basic knowledge of embedded C/C++, SoC integration, and bus protocols (UART, SPI, I2C, I2S).
• Ability to deliver high-quality VHDL modules and verification environments.
• Willingness to work evenings and weekends as needed to meet critical project milestones.
• Bachelor of Science (or higher) in Electrical Engineering.
• Experience in ASIC design, DSP, or communication systems.
• Prior exposure to high-speed interface design for RF systems.
• Knowledge of Verilog.
• Experience with simulation and verification tools such as ModelSim, ISE Simulator, or equivalent.
• Prior experience with verification frameworks (UVM, OSVVM, OVM, etc.)
• Expertise in synchronous and asynchronous digital design, pipelines, finite-state machines, and FPGA architecture.
• Experience working with memory-mapped and stream interfaces (AXI-4, Avalon, AXI-Stream).
• Experience with the development of high-speed interfaces using Gigabit Transceivers (ex., PCIe, Ethernet, DisplayPort).
• Proficiency with hardware debugging tools, including logic analyzers, oscilloscopes, and timing analysis.
• Understanding of FPGA constraints, timing closure, and synthesis directives.

None flagged.