Job description

Ready to make connectivity from space universally accessible, secure and actionable? Then you’ve come to the right place! E-Space is bridging Earth and space to enable hyper-scaled deployments of Internet of Things (IoT) solutions and services. We are building a highly-advanced low Earth orbit (LEO) space system that will fundamentally change the design, economics, manufacturing and service delivery associated with traditional satellite and terrestrial IoT systems. We’re intentional, we’re unapologetically curious and we’re 100% committed to innovate space-based communications and deliver actionable intelligence that will expand global economies, protect space and our planet and enhance our overall quality of life. We are hiring FPGA Verification Engineers to build and maintain the verification infrastructure for satellite avionics FPGA designs. You will develop UVM-based testbenches, create coverage-driven verification plans, and ensure RTL correctness for flight-critical FPGA firmware across multiple subsystems. This role is instrumental in establishing a rigorous verification methodology for the program. Key Responsibilities: Develop UVM-based verification environments including agents, scoreboards, and bit-accurate reference models. Create and maintain a reusable, extendable UVM framework supporting multiple FPGA targets and device configurations. Write verification plans derived from requirements specifications and architectural documents. Develop functional coverage models and drive coverage closure for all FPGA designs. Perform RTL simulation using industry-standard tools. Implement clock-domain crossing verification and timing/stability analysis. Apply lint and static-analysis tools to identify design issues early in the development cycle. Support hardware bring-up by creating tests that model and recreate hardware interactions in simulation. Document verification results, coverage metrics, and test plans with clear technical writing. Collaborate with FPGA designers and system engineers to refine requirements and close verification gaps. Required Qualifications: Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field. 4+ years of experience in FPGA or ASIC verification. Strong expertise in SystemVerilog and UVM-based verification methodology. Experience building UVM agents, environments, and generating constrained-random stimulus. Proficiency with at least one industry-standard RTL simulator. Understanding of functional coverage techniques and coverage-driven verification. Ability to read and understand PCB schematics and hardware interfaces for test development. Preferred Qualifications: Experience verifying designs for space, aerospace, or high-reliability applications. Familiarity with formal verification tools. Background in embedded software interaction with FPGA firmware. Experience with continuous integration workflows for verification regressions. Proficiency in Python, TCL, or shell scripting for test automation and infrastructure. Exposure to DFMEA and high-reliability digital design review processes. Tools & Technologies: Industry-standard RTL simulators (e.g., VCS, QuestaSim, or equivalent) UVM verification methodology Lint and CDC analysis tools Python/TCL scripting for automation Additional Requirements This is a fast-paced, high-impact environment - flexibility to occasionally work extended hours or weekends during critical periods is expected. Why E-Space is right for you: As a member of our team, you will play a crucial role in driving our success. Our team members have a strong sense of dedication and responsibility; this includes a strong commitment to our mission to create an entirely new suite of global capabilities to improve lives, business efficiencies and build a smarter planet. This means that there will be times when extra hours, including nights and weekends, may be needed to meet critical deadlines and mission goals. In return, we offer a dynamic work environment with opportunities for professional growth and development and the chance to make a meaningful impact in a high-growth industry. We want you to make the most of your journey at E-Space. That’s why we support and invest in the physical, emotional and financial well-being of our team members and their families. Some of what you can expect when working at E-Space: • An opportunity to really make a difference • Sustainability at our core • Fair and honest workplace • Innovative thinking is encouraged • Competitive salaries • Continuous learning and development • Health and wellness care options • Financial solutions for the future • Optional legal services (US only) • Paid holidays • Paid time off

Requirements

Must-haves

Ready to make connectivity from space universally accessible, secure and actionable? Then you’ve come to the right place!
Develop UVM-based verification environments including agents, scoreboards, and bit-accurate reference models.
Create and maintain a reusable, extendable UVM framework supporting multiple FPGA targets and device configurations.
Write verification plans derived from requirements specifications and architectural documents.
Develop functional coverage models and drive coverage closure for all FPGA designs.
Perform RTL simulation using industry-standard tools.
Implement clock-domain crossing verification and timing/stability analysis.
Apply lint and static-analysis tools to identify design issues early in the development cycle.
Support hardware bring-up by creating tests that model and recreate hardware interactions in simulation.
Document verification results, coverage metrics, and test plans with clear technical writing.
Collaborate with FPGA designers and system engineers to refine requirements and close verification gaps.
Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
4+ years of experience in FPGA or ASIC verification.
Strong expertise in SystemVerilog and UVM-based verification methodology.
Experience building UVM agents, environments, and generating constrained-random stimulus.
Proficiency with at least one industry-standard RTL simulator.
Understanding of functional coverage techniques and coverage-driven verification.
Ability to read and understand PCB schematics and hardware interfaces for test development.

Nice-to-haves

Experience verifying designs for space, aerospace, or high-reliability applications.
Familiarity with formal verification tools.
Background in embedded software interaction with FPGA firmware.
Experience with continuous integration workflows for verification regressions.
Proficiency in Python, TCL, or shell scripting for test automation and infrastructure.
Exposure to DFMEA and high-reliability digital design review processes.

Application prep

Use the role’s language and application details while tailoring your materials.

Keywords to mirror

python

Platform: lever
Effort: quick

Benefits

Benefits detected in the listing.

Paid Time Off

Wellness