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Distance Exact 10 miles 15 miles 25 miles 50 miles 65 miles 100 miles 500 miles Advanced Search &nbsp Search Job Details Engineering Electrical Design and Analysis Engineer 3 El Segundo, CA Posted: 9/18/2026 Job Description Job ID#: 225582 Job Category: Engineering Position Type: Associate - W2 Duration: 26 Shift: 1 Positions Available: 5 PDS Defense, Inc. is seeking an Electrical Design and Analysis Engineer 3, in El Segundo, CA. Job ID#225582 Pay Rate: $73 - $78/hr Job Description: Analyzes customer and system requirements to develop basic architectural approaches and detailed specifications for various electronic products. Develops high-level and detailed designs consistent with requirements and specifications. Validates designs through various methods of review, testing and analysis. Identifies, tracks and statuses technical performance measures to measure progress and ensure compliance with requirements. Supports Supplier Management with make/buy recommendations and other technical services of limited scope. Provides engineering support throughout the lifecycle of the product. Investigates emerging technologies to develop concepts for future product designs to meet projected requirements. Works under general direction. The contractor will inherit FPGA top-level design and be responsible for creating and adding new functional blocks and interfaces, including integrating third-party and in-house IP cores. Responsibilities include updating constraint files, performing synthesis, simulation, and Place & Route processes to ensure timing closure and design integrity. The candidate will program FPGA devices, primarily from the Xilinx Versal, Ultrascale, and Ultrascale+ families. The candidate must have experience troubleshooting static timing violations and creating complex designs coded in HDL (not simply instantiating IP blocks). This experience are requirements that will be screened in resume review and interview. Additionally, the contractor will collaborate closely with the system engineering team to support hardware and software system integration as well as testing activities to deliver a fully functioning system. Basic Requirements 2+ years of FPGA design experience; strong Xilinx/AMD Vivado experience; Verilog/SystemVerilog proficiency; Advanced FPGA implementation skills (synthesis, timing closure, constraints) Preferred Requirements 5+ years of FPGA and/or ASIC design experience; strong Xilinx/AMD Vivado experience; Experience with Versal family devices; Verilog/SystemVerilog HDL proficiency required; Advanced FPGA implementation skills (synthesis, timing closure, constraints) Education / Experience: Education/experience typically acquired through advanced technical education from an accredited course of study in engineering, computer science, mathematics, physics or chemistry (e.g. Bachelor) and typically 5 or more years' related work experience or an equivalent combination of technical education and experience (e.g. PhD, Master+3 years' related work experience). In the USA, ABET accreditation is the preferred, although not required, accreditation standard. Benefits offered to vary by the contract. Depending on your temporary assignment, benefits may include direct deposit, free career counseling services, 401(k), select paid holidays, short-term disability insurance, skills training, employee referral bonus, affordable medical coverage plan, and DailyPay (in some locations). For a full description of benefits available to you, be sure to talk with your recruiter. Job Requirements Minimum Security Clearance: Secret Military connected talent encouraged to apply. VEVRAA Federal Contractor / Request Priority Protected Veteran Referrals / Equal Opportunity Employer / Veterans / Disabled To read our Candidate Privacy Information Statement, which explains how we will use your information, please visit tadpgs.com or pdsdefense.com The Company will consider qualified applicants with arrest and conviction records in accordance with federal, state, and local laws and/or security clearance requirements, including, as applicable: • The California Fair Chance Act • Los Angeles City Fair Chance Ordinance • Los Angeles County Fair Chance Ordinance for Employers • San Francisco Fair Chance Ordinance Already have an account? Login here © PDS Defense Privacy Policy | Terms and Conditions | EEO Statement and Legal Notices |

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Electrical Design and Analysis Engineer 3 El Segundo, CA Posted: 9/18/2026
Associate - W2
PDS Defense, Inc. is seeking an Electrical Design and Analysis Engineer 3, in El Segundo, CA. Job ID#225582
Pay Rate: $73 - $78/hr
Additionally, the contractor will collaborate closely with the system engineering team to support hardware and software system integration as well as testing activities to deliver a fully functioning system.
2+ years of FPGA design experience;
strong Xilinx/AMD Vivado experience;
Verilog/SystemVerilog proficiency;
Advanced FPGA implementation skills (synthesis, timing closure, constraints)
5+ years of FPGA and/or ASIC design experience;
Verilog/SystemVerilog HDL proficiency required;
Military connected talent encouraged to apply.
VEVRAA Federal Contractor / Request Priority Protected Veteran Referrals / Equal Opportunity Employer / Veterans / Disabled
To read our Candidate Privacy Information Statement, which explains how we will use your information, please visit http://www.tadpgs.com/candidate-privacy/ or https://pdsdefense.com/candidate-privacy/
The Company will consider qualified applicants with arrest and conviction records in accordance with federal, state, and local laws and/or security clearance requirements, including, as applicable:
The California Fair Chance Act
Los Angeles City Fair Chance Ordinance
Los Angeles County Fair Chance Ordinance for Employers
San Francisco Fair Chance Ordinance

Nice-to-haves

strong Xilinx/AMD Vivado experience;
Experience with Versal family devices;
Advanced FPGA implementation skills (synthesis, timing closure, constraints)
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401(K)