Job description

#WeAreIn to create tiny chips and big careers. Trade your textbooks for tools to innovate. Let’s shape your next step together. Whether through our Graduate Programs or your first full-time role, Infineon gives you the tools, trust and challenges to grow fast and go far. Are you in? We are searching for a talented individual with a good understanding of analog circuit design to drive the analog behavioral modeling role and to become an integral part of the Infineon R&D team. The successful candidate will join a dynamic team of designers, chip architects, and systems engineers to develop leading-edge high-performance power management solutions for the computing market. Your role Key responsibilities in your new role • Methodology : Develop new strategies that leverage AI to aid in the improvement of the verification flow and translates to faster iteration cycles, better coverage testing, higher quality documentation, and overall product successes • Modeling: Generate Verilog-AMS and SystemVerilog behavioral models and correlate results with schematic-level performance using targeted testbenches • Testbench: Develop mixed-signal simulation workbenches in Cadence ADE Explorer and Xcelium and automate regression runs • Schematic/Netlist: Create schematics, produce schematic netlists for simulation, and maintain hierarchy configurations for tool flows • Verification: Verify device-level and system-level requirements through simulation, interpreting results and documenting discrepancies • DFT/Testability: Contribute to verification of DFT plans, digital scan support, ATE preparation, and bench testability assessments • Debugging: Debug analog and digital integration issues and drive resolution with design and test teams • Collaboration: Coordinate with design, test, and production teams to support pre-silicon verification and production IC validation • Rotation travel: Participate in training rotations across 2–4 divisions, work with multiple managers, and travel to various U.S. locations as needed for a two year period • Presentations : Create and present progress PowerPoint updates for the program, product demonstrations (if applicable) for internal and external teams as needed • Mentoring : Mentor future RGP members during your last year as a RGP (roughly 1 hour per month during active mentoring periods) The successful candidate will need to be a very organized and detail-oriented individual. This person must also be highly motivated, innovative, and capable of carrying out tasks to a successful conclusion. Your profile Qualifications and skills to help you succeed • Education: BSEE, BSME, or equivalent with 1+ years of relevant verification experience • Tools: Proficient with Cadence Virtuoso, ADE Explorer, Xcelium, and Spectre simulation flows • Modeling: Experienced in Verilog-AMS/SystemVerilog and AMS behavioral modeling practices • Scripting: Comfortable scripting in Python, and/or C/C++ for automation and data parsing • Environment: Familiar with Unix/Linux command line, editors, and version control systems • Soft Skills: Strong debugging skills, effective cross-functional communication, and ability to work independently and in teams • Processes: Experience using bug tracking systems and maintaining reproducible simulation regressions • Mobility : Willingness to travel ~20% for the RGP role for a two year period, then return to either Andover MA, Raleigh NC, or Austin TX at the end of the program Additional information Infineon Technologies is an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex (including pregnancy, childbirth, or related medical conditions), gender identity, national origin, ancestry, citizenship, age, physical or mental disability, legally protected medical condition, family care status, military or veteran status, marital status, domestic partner status, sexual orientation, or any other basis protected by local, state, or federal laws. Employment at Infineon is contingent upon proof of your legal right to work in the United States under applicable law, verification of satisfactory references, successful completion of a background check and drug test, and signing all your on-boarding documents. In some instances, if applicable, U.S. export control laws require that Infineon obtain a U.S. government export license prior to releasing technologies to certain persons. This offer is contingent upon Infineon's ability to satisfy these export control laws as related to your employment and anticipated job activities. The decision whether or not to submit and/or pursue an export license to satisfy this contingency, if applicable, shall be at Infineon's sole discretion. Infineon Technologies takes data privacy and identity theft very seriously. As such, we do not request personally-identifiable information (PII) from applicants over the internet or electronically. Please kindly refrain from disclosing your PII electronically during the application process or to unauthorized websites that may purport to be Infineon or any of our affiliates. Salary pay information: Location Indicative salary range Andover, MA United States Wage range that the company expects to pay for a qualified candidate: US$ 65,000 – US$ 90,000 In addition, all employees will be eligible to participate in an incentive plan. #WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity. Our hiring decisions are based on skills and experience. Even if you don’t meet every requirement, we encourage you to apply. Please let your recruiter know if you need any accommodations during the interview process. Learn more about our various contact channels and about Diversity & Inclusion at Infineon.

Requirements

Must-haves

#WeAreIn to create tiny chips and big careers.
Trade your textbooks for tools to innovate.
Let’s shape your next step together.
Whether through our Graduate Programs or your
first full-time role, Infineon gives you the tools, trust and challenges to
grow fast and go far.
Your role Key responsibilities in your new role
Methodology : Develop new strategies
that leverage AI to aid in the improvement of the verification flow and
translates to faster iteration cycles, better coverage testing, higher quality
documentation, and overall product successes
Modeling: Generate Verilog-AMS and SystemVerilog behavioral models and correlate results with schematic-level performance using targeted testbenches
Testbench: Develop mixed-signal simulation workbenches in Cadence ADE Explorer and Xcelium and automate regression runs
Schematic/Netlist: Create schematics, produce schematic netlists for simulation, and maintain hierarchy configurations for tool flows
Verification: Verify device-level and system-level requirements through simulation, interpreting results and documenting discrepancies
DFT/Testability: Contribute to verification of DFT plans, digital scan support, ATE preparation, and bench testability assessments
Debugging: Debug analog and digital integration issues and drive resolution with design and test teams
Collaboration: Coordinate with design, test, and production teams to support pre-silicon verification and production IC validation
Rotation travel: Participate in training rotations across 2–4 divisions, work with multiple managers, and travel to various U.S. locations as needed for a two year period
Presentations : Create and present progress PowerPoint updates for the program, product demonstrations (if applicable) for internal and external teams as needed
Mentoring : Mentor future RGP members during your last year as a RGP (roughly 1 hour per month during active mentoring periods)
The successful candidate will need to be a very
organized and detail-oriented individual. This person must also be highly
motivated, innovative, and capable of carrying out tasks to a successful

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goaipython

Platform: eightfold
Effort: medium

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