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Distance Exact 10 miles 15 miles 25 miles 50 miles 65 miles 100 miles 500 miles Advanced Search &nbsp Search Job Details Engineering Circuit Design Engineer 3 Cincinnati, OH Posted: 10/19/2026 Job Description Job ID#: 226809 Job Category: Engineering Position Type: Associate - W2 Duration: 26 Shift: 1 Positions Available: 2 PDS Defense, Inc. is seeking a Circuit Design Engineer 3, in Cincinnati, OH. Job ID#226809 Job Description: We are seeking a PCB Layout Designer using Xpedition based out of Cincinnati, OH. As a Sr. Principal/ Staff PCB Layout Design Engineer, you will have a challenging and rewarding opportunity to support the design and delivery of high‑reliability circuit card assemblies for aerospace, defense, and space flight applications. You will collaborate across electrical, mechanical, manufacturing, and signal integrity disciplines to transform complex electrical architectures and schematics into robust, production‑ready printed circuit board solutions. The successful candidate will be collaborative, open, and team‑oriented, with a focus on shared responsibility, continuous learning, and a culture of innovation and technical excellence. For this role, responsibilities include but are not limited to: Execute the placement and routing of complex, high‑density, multi‑layer printed circuit boards (PCBs), including high‑speed digital, RF, mixed‑signal, and power circuits Interpret electrical schematics, constraints, and mechanical boundaries to develop optimized PCB layouts that meet performance, reliability, and manufacturability requirements Generate and maintain complete PCB and circuit card assembly (CCA) fabrication and assembly documentation packages, including artwork, drawings, fabrication notes, and data outputs for procurement and assembly partners Apply current IPC and high‑reliability industry standards, as well as applicable military and aerospace criteria, in the design and verification of printed wiring boards and circuit card assemblies Collaborate closely with electrical, mechanical, manufacturing, and signal integrity engineers to address layout‑related design challenges involving signal integrity, power integrity, thermal management, and packaging Support and perform Design for Manufacturing (DFM), Design for Assembly (DFA), and Design for Test (DFT) reviews using automated and manual checks to improve yield, test coverage, and product robustness Work with fabrication and assembly suppliers to understand manufacturing capabilities and constraints and incorporate them into PCB designs Support PCB library management practices, ensuring correct use of symbols, footprints, and parameter data in accordance with internal workflows Independently own PCB layout tasks from concept through fabrication data release in support of program cost, schedule, and technical requirements Lead advanced PCB layout efforts using technologies such as High‑Density Interconnect (HDI), microvias, via‑in‑pad, backdrilling, and specialized substrate materials; provide technical guidance, peer reviews, and mentoring to other layout designers This requisition may be filled at either a Sr. Principal Level or a Staff Level. This requisition may be filled at a higher grade based on qualifications listed below. Basic Qualifications for a Sr. Principal PCB Layout Designer 8 Years with Bachelors in Science; 6 Years with Masters; 4 Years with PhD Active Top Secret clearance Active Top Secret clearance Willingness and ability to work on‑site full‑time at the Cincinnati, OH location Minimum 8 years of experience performing engineering/layout of printed circuit boards using Xpedition Experience with the layout of multi‑layer, high‑density PCBs and circuit card assemblies, including placement and routing of high‑speed digital, RF, and/or mixed‑signal circuits Experience collaborating with diverse stakeholders across organizations and programs, including electrical design, mechanical design, manufacturing, test, and/or signal integrity Working knowledge of PCB fabrication and assembly processes, including common manufacturability and yield considerations Familiarity with IPC industry standards for PCB design and fabrication and current understanding of high‑reliability criteria Experience generating artwork and PCB/CCA documentation for procurement and assembly houses Excellent organizational and problem‑solving skills with a demonstrated ability to adapt effectively to changing requirements Basic Qualifications for a Staff PCB Layout Designer 12 Years with Bachelors in Science; 10 Years with Masters; 8 Years with PhD. Willingness and ability to work on‑site full‑time at the Cincinnati, OH location Minimum 12 years of experience performing engineering/layout of printed circuit boards using Xpedition Experience with the layout of multi‑layer, high‑density PCBs and circuit card assemblies, including placement and routing of high‑speed digital, RF, and/or mixed‑signal circuits Experience collaborating with diverse stakeholders across organizations and programs, including electrical design, mechanical design, manufacturing, test, and/or signal integrity Working knowledge of PCB fabrication and assembly processes, including common manufacturability and yield considerations Familiarity with IPC industry standards for PCB design and fabrication and current understanding of high‑reliability criteria Experience generating artwork and PCB/CCA documentation for procurement and assembly houses Excellent organizational and problem‑solving skills with a demonstrated ability to adapt effectively to changing requirements Preferred Qualifications Prior experience on defense or space flight programs with stringent reliability, documentation, and traceability requirements Demonstrated expertise in the layout of advanced, high‑density, multi‑layer printed circuit boards combining RF, high‑speed digital, and high‑power circuit sections Knowledge of PCB process workflows and library management, including creation and governance of symbols, footprints, and reusable layout elements Ability to translate complex mechanical boundaries and electrical constraints into optimized physical PCB layouts across multiple boards or modules Deep domain knowledge of high‑reliability military and aerospace hardware criteria (e.g., MIL‑PRF‑31032, MIL‑STD‑883, IPC Class 3/3A), or comparable experience demonstrating equivalent rigor Benefits offered to vary by the contract. Depending on your temporary assignment, benefits may include direct deposit, free career counseling services, 401(k), select paid holidays, short-term disability insurance, skills training, employee referral bonus, affordable medical coverage plan, and DailyPay (in some locations). For a full description of benefits available to you, be sure to talk with your recruiter. Job Requirements Minimum Security Clearance: Top Secret/SCI Military connected talent encouraged to apply. VEVRAA Federal Contractor / Request Priority Protected Veteran Referrals / Equal Opportunity Employer / Veterans / Disabled To read our Candidate Privacy Information Statement, which explains how we will use your information, please visit tadpgs.com or pdsdefense.com The Company will consider qualified applicants with arrest and conviction records in accordance with federal, state, and local laws and/or security clearance requirements, including, as applicable: • The California Fair Chance Act • Los Angeles City Fair Chance Ordinance • Los Angeles County Fair Chance Ordinance for Employers • San Francisco Fair Chance Ordinance Already have an account? Login here © PDS Defense Privacy Policy | Terms and Conditions | EEO Statement and Legal Notices |

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Circuit Design Engineer 3 Cincinnati, OH Posted: 10/19/2026
Associate - W2
PDS Defense, Inc. is seeking a Circuit Design Engineer 3, in Cincinnati, OH. Job ID#226809
For this role, responsibilities include but are not limited to:
Execute the placement and routing of complex, high‑density, multi‑layer printed circuit boards (PCBs), including high‑speed digital, RF, mixed‑signal, and power circuits
Interpret electrical schematics, constraints, and mechanical boundaries to develop optimized PCB layouts that meet performance, reliability, and manufacturability requirements
Generate and maintain complete PCB and circuit card assembly (CCA) fabrication and assembly documentation packages, including artwork, drawings, fabrication notes, and data outputs for procurement and assembly partners
Apply current IPC and high‑reliability industry standards, as well as applicable military and aerospace criteria, in the design and verification of printed wiring boards and circuit card assemblies
Collaborate closely with electrical, mechanical, manufacturing, and signal integrity engineers to address layout‑related design challenges involving signal integrity, power integrity, thermal management, and packaging
Support and perform Design for Manufacturing (DFM), Design for Assembly (DFA), and Design for Test (DFT) reviews using automated and manual checks to improve yield, test coverage, and product robustness
Work with fabrication and assembly suppliers to understand manufacturing capabilities and constraints and incorporate them into PCB designs
Support PCB library management practices, ensuring correct use of symbols, footprints, and parameter data in accordance with internal workflows
Independently own PCB layout tasks from concept through fabrication data release in support of program cost, schedule, and technical requirements
This requisition may be filled at either a Sr. Principal Level or a Staff Level.
This requisition may be filled at a higher grade based on qualifications listed below.
Basic Qualifications for a Sr. Principal PCB Layout Designer
8 Years with Bachelors in Science; 6 Years with Masters; 4 Years with PhD Active Top Secret clearance

Nice-to-haves

Prior experience on defense or space flight programs with stringent reliability, documentation, and traceability requirements
Demonstrated expertise in the layout of advanced, high‑density, multi‑layer printed circuit boards combining RF, high‑speed digital, and high‑power circuit sections
Knowledge of PCB process workflows and library management, including creation and governance of symbols, footprints, and reusable layout elements
Ability to translate complex mechanical boundaries and electrical constraints into optimized physical PCB layouts across multiple boards or modules
Deep domain knowledge of high‑reliability military and aerospace hardware criteria (e.g., MIL‑PRF‑31032, MIL‑STD‑883, IPC Class 3/3A), or comparable experience demonstrating equivalent rigor
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401(K)