Job description

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Marvell's Broadband Analog group designs physical layer ICs for high-speed optical fiber data communication, such as Transimpedance Amplifiers (TIAs), and Drivers for Silicon Photonic (SiPho), Electro-absorption Modulators (EAMs), and Mach-Zehnder Interferometer Modulators (MZMs). This group is the market leader in delivering TIAs and Drivers for Data Center and Telecom markets. We address the bandwidth, capacity and power issues faced by cloud computing and mega data center networks. Our world class group leverages our core competencies in advanced circuit design to solve the world’s ever-increasing desire to transmit more data for less power with fewer errors. We are continually first to market in Data Center, Metro and Long-Haul applications. As a member of the design group, the candidate will be responsible for design and validation of FET and BiCMOS circuits for high-speed broadband ICs that serve these applications. What You Can Expect Marvell is seeking a Director of RF and Analog Design to contribute to the development of 100s Gbps Transimpedance Amplifiers TIAs and Optical Modulator Drivers. The results of our innovative designs have made our TIAs best in class for coherent long-haul and metro systems as well as PAM4 data center systems. These optical interface chips are tightly coupled with our silicon photonics chips and high-performance equalizers. In this role you will be responsible for: Technical leadership. Oversight of leading edge optical modulator driver and transimpedance amplifier design, in Silicon Germanium (SiGe) BiCMOS (Bipolar Complementary Metal Oxide Semiconductor) and advanced node FinFET technologies, where circuit performance will need to transcend beyond industry leading products. Defining high-performance broadband analog circuits for optical front-end receivers and transmitters, including TIAs and modulator and laser drivers. Working with systems, DSP and silicon photonics teams as well as customers. Defining interface specifications between DSP and Optics components. Working with other functional groups to facilitate post-silicon validation, qualification, transition to mass production, and customer support. Managing individual and team performance. Ensuring delivery of objectives on time Ensuring high quality deliverables Managing methodologies and training team members on such Mentoring members of the team in analog design and project management. What We re Looking For Bachelor’s degree in Electrical Engineering with 15 years of related professional experience. Master’s degree in Electrical Engineering with 10-12 years of related professional experience. PhD in Electrical Engineering with 8-10 years of related professional experience. Proven experience managing a team of analog designers doing high speed broadband design. Assigning resources to staff multiple concurrent projects. Managing individual and team performance. Guiding career growth of team members. Promoting and maintaining a highly motivated collaborative team culture. Maintaining, developing and enforcing a rigorous design methodology. Mentoring junior engineers in analog design Mentoring mid-level engineers in project management Guiding senior engineers in project management and mentoring of junior engineers. Experience in the following is needed: Proven leadership and experience in working with multidisciplinary teams & projects Experience as chip lead with success in silicon Experience in taking chips to mass production Ability to translate chip level specifications into architecture Deep understanding of analog design fundamentals, including: Detailed transistor level design RF/High-Speed broadband design (10GHz ) Device physics Control/Feedback loop stability analysis Direct project experience in at least one of the following areas is a plus: AGC loop design High precision analog circuits (Including linear regulators, current sensors, bandgaps and DAC/ADC) Experience in CTLE design Solid experience in Using EDA CAD tools Overseeing Analog Custom Layout Project experience in using different technologies. (SiGe BiCMOS and/or Advanced FinFET nodes) Direct experience with Optical Transimpedance Amplifiers (TIAs) or Optical Modulator Drivers is a plus Experience in Package and System integration issues desired Strong communication, presentation and documentation skills Analytical Thinking: Strong analytical and problem-solving abilities, with a knack for strategic planning and operational optimization. Business Acumen: Ability to align technological advancements with core business goals and drive measurable outcomes. Adaptability: Comfortable working in a fast-paced, evolving environment and managing ambiguity. Integrity: A record of ethical decision-making and commitment to upholding organizational values. Expected Base Pay Range (USD) 217,100 - 321,230, $ per annum The successful candidate’s starting base pay will be determined based on job-related skills, experience, qualifications, work location and market conditions. The expected base pay range for this role may be modified based on market conditions. This role is eligible to participate in Marvell's bonus and equity plans, including a new hire equity grant and annual equity refreshers, ensuring you are rewarded for your contributions and remain invested in the company's long-term success. Additional Compensation and Benefit Elements Marvell is committed to providing exceptional, comprehensive benefits that support our employees at every stage - from internship to retirement and through life’s most important moments. Our offerings are built around four key pillars: financial well-being, family support, mental and physical health, and recognition. Highlights include an employee stock purchase plan with a 2-year look back, family support programs to help balance work and home life, robust mental health resources to prioritize emotional well-being, and a recognition and service awards to celebrate contributions and milestones. We look forward to sharing more with you during the interview process. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status. Any applicant who requires a reasonable accommodation during the selection process should contact Marvell HR Helpdesk at TAOps marvell.com . Interview Integrity To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews. These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process. This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment. #LI-TD1

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