Context
As chip sizes increase and packaging technologies become more complex, substrate engineering is emerging as a critical domain. This role supports TSMC’s leadership in 3DIC and advanced packaging by extending expertise beyond chip-level design into package-level integration. The team is addressing challenges such as warpage, power delivery, thermal management, and material innovation. Future evolution includes Chip-on-Wafer-on-PCB (CoWoP) under TSMC’s System Technology Optimization program.
The position requires strong design and technology expertise to define future customer requirements, focusing on integrated packaging (IP), dielectric parameters, high-speed I/O, and trade-offs that directly impact system performance. This role is critical in shaping the direction of 3DIC development.
Overview
We are seeking a highly skilled and motivated Substrate / Advanced Package Engineer to join our cutting-edge 3DIC design team. The ideal candidate will have a strong foundation in semiconductor physics, mechanical engineering principles, and EDA (Electronic Design Automation) tools, with a passion for innovation in advanced package design. The role involves design, simulation, and modeling of complex substrate and packaging technologies to support next generation 3DIC applications.
Responsibilities
• Design, simulate, and optimize advanced packaging for 3DIC applications.
• Collaborate with cross-functional teams to define specifications and requirements.
• Perform modeling of warpage, stress, reliability, and thermal performance using industry-standard EDA tools.
• Formulate and solve problems in research-driven, often ambiguous domains.
• Provide guidance on high-speed I/O modeling and integration.
• Develop and maintain documentation, including specifications, test plans, and design reviews.
Stay current with industry trends, tools, and technologies in advanced packaging.
Requirements
• Master’s degree or Ph.D. in Electrical Engineering, Mechanical Engineering, or a related field.
• 15+ years of hands-on expertise in advanced packaging technologies and substrate design.
• Understanding of semiconductor device physics and packaging process technologies.
• Strong knowledge of warpage, stress, and thermal effects in packaging.
• Proven ability to drive solutions in ambiguous, research-oriented contexts.
• Excellent problem-solving, analytical, and communication skills.
• Strong collaboration skills, with the ability to mentor junior engineers.
• Ability to balance strategic insight with hands-on technical execution.
Preferred Skills
• Experience with reliability, IR/EM, and multi-physics analysis.
• Familiarity with machine learning techniques for design optimization.
• Patents, publications, or demonstrated innovation in substrate or packaging domains.
Success Metrics
• Ability to provide impactful, data-driven suggestions that influence design direction.
• Effective use of modeling and simulation to validate proposals.
• Establishing trust and credibility with global teams.
• Enabling adoption of new technologies within the 3DIC ecosystem.
Location
• San Jose, CA or Hsinchu, Taiwan.
Why TSMC?
At TSMC, you will be part of the world’s leading semiconductor foundry, driving cutting-edge innovation in advanced packaging and 3DIC technologies. You will collaborate with world-class engineers, work on industry-defining projects, and shape the future of system integration. We offer unparalleled opportunities for growth, impact, and contribution to the global technology ecosystem.
Company Description
As a trusted technology and capacity provider, TSMC is driven by the desire to be:
• The world’s leading dedicated semiconductor foundry
• The technology leader with a strong reputation for manufacturing excellence
• Advancing semiconductor manufacturing innovations to enable the future of technology
TSMC pioneered the pure-play foundry business model when it was founded in 1987 and has been the world’s leading dedicated semiconductor foundry ever since. The Company supports a thriving ecosystem of global customers and partners with the industry’s leading process technologies and a portfolio of design enablement solutions to unleash innovation for the global semiconductor industry. With global operations spanning Asia, Europe, and North America, TSMC serves as a committed corporate citizen around the world.
In North America, TSMC has a strong sales and service organization that works with customers by helping them achieve silicon success with cutting-edge technologies and manufacturing excellence. The Company has continued to accelerate its R&D investment and staffing in recent years and is expanding its manufacturing footprint to support customer innovation with 3D IC technologies and optimal manufacturing capacity.
For positions requiring access to technical data subject to export control regulations, including Export Administration Regulations, TSMC North America may have to obtain export licensing approval from the U.S. Government for certain individuals. All employment is contingent upon TSMC North America obtaining any export license or other approval that may be required by the U.S. Government.
Diversity statement
TSMC Technology, Inc. is committed to employing a diverse workforce and provides Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, or any other characteristic protected by applicable law.
TSMC is an equal opportunity employer prizing diversity and inclusion. We are committed to treating all employees and applicants for employment with respect and dignity. If you require reasonable accommodation due to a disability during the application or the recruiting process, please feel free to notify us at G_ACCOMMODATIONS@TSMC.COM . TSMC confirms to all applicants its commitment to meet TSMC’s obligations under applicable employment law. Reasonable accommodations will be determined on a case-by-case basis.
Pay Transparency / Benefits statement
At TSMC, your base pay is only part of your overall total compensation package. At the time of this posting, this role typically pays a base salary between $153,500 and $250,000 per year. The range displayed reflects the minimum and maximum target for new hires. Actual pay may be more or less than the posted range. Factors that influence pay include the individual's skills, qualifications, education, experience and the position level and location. TSMC’s total compensation package consists of market competitive pay, allowances, bonuses, and comprehensive benefits. We also offer extensive development opportunities and programs.
For roles hired outside of California, including other U.S. states or international locations such as Taiwan, compensation may vary in accordance with local market practices, legal requirements, and TSMC’s regional compensation framework.