Job description

At Cornelis we’re building the future of AI and HPC networking with an AI-first approach to silicon and software development. We’re seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from chip architecture to system performance at scale. Cornelis Networks delivers the world’s highest performance scale-out networking solutions for AI and HPC datacenters. Our differentiated architecture seamlessly integrates hardware, software and system level technologies to maximize the efficiency of GPU, CPU and accelerator-based compute clusters at any scale. Our solutions drive breakthroughs in AI & HPC workloads, empowering our customers to push the boundaries of innovation. Backed by top-tier venture capital and strategic investors, we are committed to innovation, performance and scalability - solving the world’s most demanding computational challenges with our next-generation networking solutions. We are a fast-growing, forward-thinking team of architects, engineers, and business professionals with a proven track record of building successful products and companies. As a global organization, our team spans multiple U.S. states and six countries, and we continue to expand with exceptional talent in onsite, hybrid, and fully remote roles. Cornelis Networks is hiring a Senior ASIC Verification Engineer with advanced skills and knowledge in key areas required to verify world-class SoCs to be deployed in high performance computing, high performance data analytics, and artificial intelligence interconnect solutions. As a member of the ASIC leadership team with hands-on technical experience, you will be responsible for the verification closure of entire projects, including design modules, sub-systems, and SoCs. You will drive a wide range of activities including test-planning, UVM based testbench development, regression and coverage closure. You will have the opportunity to partner and collaborate with ASIC design, emulation, system hardware and post-silicon teams and help create a first-pass silicon success. A preferred candidate will have 8+ years of relevant experience in networking hardware verification, proven expertise in verifying one or more of the following: 50G, 100G, 400G Ethernet MAC/PCS protocols, UDP, TCP/IP, RDMA/RoCE, IPSec. and their application in high-speed data processing/networking. Experience utilizing AI tools to generate test plans and improve the productivity of verification process and team is highly desirable. Key Technical Responsibilities: Define overall SOC level verification strategy, technical planning, direction Enable and drive the development of UVM environments to verify RTL at block, unit, and SoC levels Develop and execute functional tests according to verification test plans Instrument TB for functional and code coverage and drive to closure based on the coverage metrics Collaborate with cross-functional teams like design, software, emulation and silicon validation teams towards ensuring the highest design quality Team Responsibilities: Day-to-day guidance and leadership of team members Driving results via mentoring, coaching, and counseling Education of team in the use of AI tools to enhance productivity and efficiencies Generation and enforcement of coding and verification guidelines Minimum Qualifications: 8+ years of experience with the following: Hands-on experience with writing code using UVM/System Verilog Verification for complex SoCs that include multiple clock and reset domains, using VCS or equivalent simulation tools Debugging fails to the line of RTL, closing out bug fixes, using Verdi or equivalent debug tools Experience in ground up testbench development Experience with revision control systems like Git or SVN etc. B.S. Degree in Computer Engineering, Computer Science, or Electrical Engineering Preferred Qualifications: M.S. Degree in Computer Engineering, Computer Science, or Electrical Engineering 8+ years of relevant experience in networking hardware verification, proven expertise in verifying 50G, 100G, 400G Ethernet MAC/PCS protocols, TCP/IP, RDMA/RoCE, IPSec. and their application in high-speed data processing/networking One or more scripting languages (TCL, Python, Perl, Shell-scripting) Track record of first-pass success in ASIC and Systems Location: This is a remote position for employees residing within the United States. We offer a competitive compensation package that includes equity, cash, and incentives, along with health and retirement benefits. Our dynamic, flexible work environment provides the opportunity to collaborate with some of the most influential names in the semiconductor industry. At Cornelis Networks your base salary is only one component of your comprehensive total rewards package. Your base pay will be determined by factors such as your skills, qualifications, experience, and location relative to the hiring range for the position. Depending on your role, you may also be eligible for performance-based incentives, including an annual bonus or sales incentives. In addition to your base pay, you’ll have access to a broad range of benefits, including medical, dental, and vision coverage, as well as disability and life insurance, a dependent care flexible spending account, accidental injury insurance, and pet insurance. We also offer generous paid holidays, 401(k) with company match, and Open Time Off (OTO) for regular full-time exempt employees. Other paid time off benefits include sick time, bonding leave, and pregnancy disability leave. Cornelis Networks does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. Cornelis Networks is an equal opportunity employer, and all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity or expression, pregnancy, age, national origin, disability status, genetic information, protected veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants’ needs under the respective laws throughout all stages of the recruitment and selection process.

Requirements

Must-haves

Define overall SOC level verification strategy, technical planning, direction
Enable and drive the development of UVM environments to verify RTL at block, unit, and SoC levels
Develop and execute functional tests according to verification test plans
Instrument TB for functional and code coverage and drive to closure based on the coverage metrics
Collaborate with cross-functional teams like design, software, emulation and silicon validation teams towards ensuring the highest design quality
Day-to-day guidance and leadership of team members
Driving results via mentoring, coaching, and counseling
Education of team in the use of AI tools to enhance productivity and efficiencies
Generation and enforcement of coding and verification guidelines
Hands-on experience with writing code using UVM/System Verilog
Verification for complex SoCs that include multiple clock and reset domains, using VCS or equivalent simulation tools
Debugging fails to the line of RTL, closing out bug fixes, using Verdi or equivalent debug tools
Experience in ground up testbench development
Experience with revision control systems like Git or SVN etc.
B.S. Degree in Computer Engineering, Computer Science, or Electrical Engineering

Nice-to-haves

M.S. Degree in Computer Engineering, Computer Science, or Electrical Engineering
One or more scripting languages (TCL, Python, Perl, Shell-scripting)
Track record of first-pass success in ASIC and Systems
Location: This is a remote position for employees residing within the United States.

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Keywords to mirror

aipython

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Benefits

Benefits detected in the listing.

Dental

Vision

401(K)

Paid Time Off