Job description

Product Line Manager – Optical I/O Chiplets Location: San Jose (on-site) Ayar Labs is shattering AI data bottlenecks by moving data at the speed of light. As pioneers of co-packaged optics (CPO), we use light instead of electricity to move data faster, further, and with a fraction of the energy needed to fuel the explosive growth of AI models. Backed by NVIDIA, AMD, and Intel and manufactured in partnership with the world's leading semiconductor ecosystem, Ayar Labs' co-packaged optics solution is key to unleashing next-generation AI scale-up architectures. You will own the commercial and technical success of TeraPHY™, our optical I/O chiplet product line — one of the most advanced heterogeneous silicon products in the industry. This is a chip productization role: you drive the product from definition through tapeout, bring-up, qualification, and high-volume manufacturing, then position it to win the AI scale-up market. We're looking for a product leader who has taken a complex advanced-node chip or SoC from concept to volume production. Experience with networking, optics and photonics is a plus. Key Responsibilities • Product Strategy & Roadmap: Own the product strategy for the TeraPHY™ optical chiplet family. Author comprehensive PRDs that set the direction for engineering and manufacturing execution. • Silicon Productization: Drive the chiplet through the full product lifecycle — definition, tapeout, silicon bring-up, reliability qualification, test/yield ramp, and high-volume manufacturing. Steer the product through the internal PLC (Product Life Cycle) gate process in partnership with Engineering, Quality, Operations, and foundry/OSAT partners. • Market Intelligence: Track the evolution of AI clusters, networking switch fabrics, and disaggregated memory to shape the I/O chiplet roadmap with target customers. • Technical Marketing: Develop high-quality white papers, datasheets, application notes, and other collateral aimed at customers and partners. • Customer Engagement: Act as the primary interface for Tier 1 Cloud Service Providers (CSPs), xPU architects, and networking OEMs on chiplet integration, co-packaging, and deployment into their platforms. Basic Qualifications • Education: BS in Electrical Engineering or equivalent • Experience: 5+ years in product management or technical product roles for advanced-node silicon — chiplets, I/O die, SoCs, networking ASICs, SerDes, or memory interfaces. Silicon Photonics and optical communications experience is a plus. • Productization Track Record: Demonstrated ownership of a complex chip from definition through high-volume production, including foundry/OSAT engagement, reliability qualification, and test/yield ramp. • Technical Depth: Strong grounding in advanced packaging (2.5D/3D, chiplet integration), UCIe or comparable die-to-die interconnect, and high-speed SerDes/signaling. • Cross-Functional Execution: Strong project management and communication skills. Self-motivated to execute with minimal direction. Preferred Qualifications • Education : MS in Electrical Engineering or equivalent. MBA is a plus. Salary range: $170,000 - $223,000 NOTE TO RECRUITERS: Principals only. We are not accepting resumes from recruiters for this position. Remuneration for recruiting activities is only applicable subject to a signed and executed agreement between the parties. Please don’t send candidates to Ayar Labs, and do not contact our managers. Ayar Labs is an Affirmative Action/Equal Opportunity Employer and is strongly committed to all policies which will afford equal opportunity employment to all qualified persons without regard to age, sex, national origin, race, color, ethnicity, creed, religion, gender identity, sexual orientation, disability, veteran status, or any other characteristic protected by law. It is the policy of Ayar Labs to provide reasonable accommodation when requested by a qualified applicant or employee with a disability, unless such accommodation would cause an undue hardship. Veterans are more than welcome and encouraged to apply.

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Must-haves

Product Line Manager – Optical I/O Chiplets
Location: San Jose (on-site)
Backed by NVIDIA, AMD, and Intel and manufactured in partnership with the world's leading semiconductor ecosystem, Ayar Labs' co-packaged optics solution is key to unleashing next-generation AI scale-up architectures.
Product Strategy & Roadmap: Own the product strategy for the TeraPHY™ optical chiplet family. Author comprehensive PRDs that set the direction for engineering and manufacturing execution.
Market Intelligence: Track the evolution of AI clusters, networking switch fabrics, and disaggregated memory to shape the I/O chiplet roadmap with target customers.
Technical Marketing: Develop high-quality white papers, datasheets, application notes, and other collateral aimed at customers and partners.
Customer Engagement: Act as the primary interface for Tier 1 Cloud Service Providers (CSPs), xPU architects, and networking OEMs on chiplet integration, co-packaging, and deployment into their platforms.
Education: BS in Electrical Engineering or equivalent
Productization Track Record: Demonstrated ownership of a complex chip from definition through high-volume production, including foundry/OSAT engagement, reliability qualification, and test/yield ramp.
Technical Depth: Strong grounding in advanced packaging (2.5D/3D, chiplet integration), UCIe or comparable die-to-die interconnect, and high-speed SerDes/signaling.
Cross-Functional Execution: Strong project management and communication skills. Self-motivated to execute with minimal direction.

Nice-to-haves

We're looking for a product leader who has taken a complex advanced-node chip or SoC from concept to volume production. Experience with networking, optics and photonics is a plus.
Education : MS in Electrical Engineering or equivalent. MBA is a plus.

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