Staff/Senior Staff GPU Engineer - Shader RTL & Microarchitecture

• Tier-1 Semiconductor SoC Designer
• Location San Diego, CA or San Jose, CA (4 days onsite)
• Sector Semiconductors
• Type Permanent
• Starts Immediately
• Staff GPU Engineer – Shader RTL & Microarchitecture – Tier-1 Semiconductor SoC Designer
• Define and own GPU shader subsystem microarchitecture specifications.
• Lead RTL design for shader pipelines, instruction issue, operand collection, register files and dependency tracking.
• Collaborate with architecture, compiler and driver teams to translate ISA and API requirements into efficient hardware.
• Analyse workloads to improve occupancy, throughput, latency hiding and power efficiency.
• Support the full GPU IP lifecycle from RTL coding through verification, synthesis, tape‑out and post‑silicon bring‑up.
• 8+ years (Staff) or 10+ years (Senior Staff) of RTL, microarchitecture or architecture experience in GPUs, graphics, AI accelerators or high‑performance SoCs.
• Proficiency with SystemVerilog, Verilog, VHDL and software languages such as C/C++ and Python.
• Strong knowledge of timing, area, power, clocking, CDC/RDC and low‑power design flows.
• Solid understanding of GPU architecture, shader pipelines, memory hierarchy and performance‑power trade‑offs.
• Experience with RTL quality flows, lint, formal checks, assertions and debug.
• Apply for this role

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