Job description

Leading Fabless Semiconductor Company Location Austin, Texas (Hybrid) Sector Semiconductors Type Permanent Starts Q3 2026 Share Job description Analog Modeling Engineer – Hybrid The client Our client is a leading global fabless semiconductor company developing advanced, high-performance and power-efficient technologies for a wide range of connected applications. The company operates at the forefront of areas including AI, wireless connectivity, mobile and computing technologies, with semiconductor solutions used across consumer electronics, smart devices, automotive, high-performance computing and data center applications. Working with major technology brands worldwide, the business offers engineers the opportunity to contribute to advanced semiconductor technologies used across global markets. The role We are looking for an experienced Analog Behavioral Modeling Engineer to join the company’s mixed-signal design team in Austin, TX. In this role, you will develop behavioral models for analog and mixed-signal components, helping enable efficient design verification and integration between analog IP and digital verification environments. The position is particularly suited to an engineer with strong experience in SystemVerilog, Real Number Modeling (RNM), analog/mixed-signal verification, and behavioral modeling. The current hybrid schedule is Monday through Thursday on-site, with Friday working remotely. You will: • Develop supply-sensitive and process-aware behavioral models in SystemVerilog for analog and mixed-signal blocks. • Model circuits including ring oscillators, reference voltage generators, voltage/frequency meters, LDOs, and temperature sensors. • Perform unit-level verification to validate behavioral models against analog design specifications. • Perform Model vs. Schematic (MvS) verification to ensure model accuracy and achieve comprehensive coverage. • Debug and resolve analog behavioral modeling issues encountered during system-level digital simulations. • Develop SystemVerilog Assertions (SVA) within models to verify that digital controllers meet analog specification requirements. • Work closely with analog design, digital design, and verification teams throughout the development and verification process. Your background • Bachelor’s degree in Electrical Engineering, Electronics, or a related field. • 7+ years of experience in analog/mixed-signal verification or behavioral modeling. • Strong knowledge of SystemVerilog and Real Number Modeling (RNM). • Good understanding of analog circuits such as: Bandgaps, LDOs, Oscillators, ADCs / DACs. • Experience with simulation and debugging environments. • Proficiency in scripting languages such as Python. • Strong problem-solving and communication skills. • Ability to work effectively across analog design, digital design, and verification teams. • Experience with mixed-signal design and verification flows. • Knowledge of analog design environments such as Cadence Virtuoso. • Understanding of analog-digital integration challenges. • Knowledge of power and thermal management control circuits. • Experience with industry-standard simulation and debug tools such as VCS and Verdi is beneficial. Location Austin, Texas (Hybrid) Start date Q3 2026 At PER International we believe the best engineering teams are also the most diverse. We welcome applications from candidates of every background, and assure every applicant that they will be assessed on the strength of their work and ambition — without regard to race, gender, religion, sexual orientation or disability. Apply for this role

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Leading Fabless Semiconductor Company
Location Austin, Texas (Hybrid)
Sector Semiconductors
Type Permanent
Starts Q3 2026
Analog Modeling Engineer – Hybrid
Our client is a leading global fabless semiconductor company developing advanced, high-performance and power-efficient technologies for a wide range of connected applications.
We are looking for an experienced Analog Behavioral Modeling Engineer to join the company’s mixed-signal design team in Austin, TX.
In this role, you will develop behavioral models for analog and mixed-signal components, helping enable efficient design verification and integration between analog IP and digital verification environments.
The position is particularly suited to an engineer with strong experience in SystemVerilog, Real Number Modeling (RNM), analog/mixed-signal verification, and behavioral modeling.
The current hybrid schedule is Monday through Thursday on-site, with Friday working remotely.
Develop supply-sensitive and process-aware behavioral models in SystemVerilog for analog and mixed-signal blocks.
Model circuits including ring oscillators, reference voltage generators, voltage/frequency meters, LDOs, and temperature sensors.
Perform unit-level verification to validate behavioral models against analog design specifications.
Perform Model vs. Schematic (MvS) verification to ensure model accuracy and achieve comprehensive coverage.
Debug and resolve analog behavioral modeling issues encountered during system-level digital simulations.
Develop SystemVerilog Assertions (SVA) within models to verify that digital controllers meet analog specification requirements.
Work closely with analog design, digital design, and verification teams throughout the development and verification process.
Bachelor’s degree in Electrical Engineering, Electronics, or a related field.
7+ years of experience in analog/mixed-signal verification or behavioral modeling.
Strong knowledge of SystemVerilog and Real Number Modeling (RNM).
Good understanding of analog circuits such as: Bandgaps, LDOs, Oscillators, ADCs / DACs.
Experience with simulation and debugging environments.
Proficiency in scripting languages such as Python.

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