Job description

div]:pl-0 xl:[&>div]:border-l xl:[&>div]:pl-6 xl:first:[&>div]:border-none xl:[&>div]:border-grey-100 [&_div]:flex-1"> Category Algorithm & Architecture Location Irvine, CA Experience More than 2 Years Work Expe. Job Description We are seeking an Interconnect Communication System Design Engineer to lead the architecture, modeling, and specification of high-speed interconnect solutions. In this role, you will define system-level requirements, develop physical layer algorithms, and ensure robust performance, power, and area efficiency across various wireline standards (e.g., Ethernet, PCIe) under challenging channel conditions. This position is critical for enabling next generation high-speed connectivity in computing platforms. *The position is open for both Irvine, CA and San Jose, CA Job Description • Develop advanced algorithms and architectures for high-speed electrical/optical wireline communication systems. • Model the algorithms in MATLAB, Python, or C++ for performance evaluation. • Optimize algorithms and architectures for performance, power, area, and latency. • Collaborate with worldwide design teams and provide support for bit-true, cycle-true modeling, design verification, and post-silicon validation. • Conduct advanced research and development in future wireline communication areas. Main Requirements and Qualifications • • Deep understanding of digital signal processing (DSP), error-correction coding, and communication theory. • • Proficiency in MATLAB, Python, or C++ for system modeling. • • Experience with CDR, equalization, compensation, cancellation, sequence detection, and block or convolutional error-correction coding in electrical or optical systems is a plus. • • Experience with analog circuit design or RTL design is a plus. • • Team player with strong communication skills. • • M.S. or higher degree in EE/CS or a related field. • • • Salary Range: $188,000- $301,000 • • Employee may be eligible for performance bonus, short- and long-term incentive programs. Actual total compensation will be dependent upon the individual's skills, experience, and qualifications. In addition, MediaTek provides a variety of benefits including comprehensive health insurance coverage, life and disability insurance, savings plan, Company paid holidays, Vacation Time, Sick leave, Parental leave, 401K and more. • • • MediaTek is an Equal Opportunity Employer that is committed to inclusion and diversity to all, regardless of age, ancestry, color, disability (mental and physical), exercising the right to family care and medical leave, gender, gender expression, gender identity, genetic information, marital status, medical condition, military or veteran status, national origin, political affiliation, race, religious creed, sex (includes pregnancy, childbirth, breastfeeding and related medical conditions), and sexual orientation. • #LI-NL1

Requirements

Must-haves

div]:pl-0 xl:[&>div]:border-l xl:[&>div]:pl-6 xl:first:[&>div]:border-none xl:[&>div]:border-grey-100 [&_div]:flex-1"> Category Algorithm & Architecture
Location Irvine, CA
Experience More than 2 Years Work Expe.
The position is open for both Irvine, CA and San Jose, CA
Develop advanced algorithms and architectures for high-speed electrical/optical wireline communication systems.
Model the algorithms in MATLAB, Python, or C++ for performance evaluation.
Optimize algorithms and architectures for performance, power, area, and latency.
Collaborate with worldwide design teams and provide support for bit-true, cycle-true modeling, design verification, and post-silicon validation.
Conduct advanced research and development in future wireline communication areas.
Main Requirements and Qualifications
Deep understanding of digital signal processing (DSP), error-correction coding, and communication theory.
Proficiency in MATLAB, Python, or C++ for system modeling.
Team player with strong communication skills.
M.S. or higher degree in EE/CS or a related field.

Nice-to-haves

Experience with CDR, equalization, compensation, cancellation, sequence detection, and block or convolutional error-correction coding in electrical or optical systems is a plus.
Experience with analog circuit design or RTL design is a plus.

Application prep

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Keywords to mirror

python

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Benefits

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Health Insurance

401k

Parental Leave